• Sr . SOC / ASIC Timing

    SpaceX (Irvine, CA)
    Sr . SOC / ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a ... the ultimate goal of enabling human life on Mars. SR . SOC / ASIC TIMING ...COMPENSATION & BENEFITS: Pay range: Synthesis and Front-End STA Engineer/ Senior : $170,000.00 - $230,000.00/per year Your actual level and… more
    SpaceX (11/22/24)
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  • Sr . SOC / ASIC Physical…

    SpaceX (Redmond, WA)
    Sr . SOC / ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out ... to make this possible, with the ultimate goal of enabling human life on Mars. SR . SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
    SpaceX (02/14/25)
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  • Sr . ASIC Design Engineer (Silicon…

    SpaceX (Irvine, CA)
    Sr . ASIC Design Engineer (Silicon Engineering) at... clean design + Participate in all phases of ASIC and/or FPGA design flow (eg synthesis, timing ... the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN ENGINEER (SILICON ENGINEERING) At...problems including clock domain crossings and power optimization + ASIC / SoC system integration experience + Experience with… more
    SpaceX (02/15/25)
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  • Senior Principal ASIC / SoC

    Teradyne (North Reading, MA)
    …delivers better business results. Opportunity Overview Teradyne is seeking a Senior Principal Semiconductor Product Definer in the Silicon Strategy and Technology ... IP's roadmap and continual development in response to long-term market trends. T his senior role features extensive senior management exposure, and is a leading… more
    Teradyne (11/22/24)
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  • SoC Design and Integration Engineer…

    Qualcomm (San Diego, CA)
    …entering new area such as the PC market. Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills. Besides ASIC and/or FPGA ... This is a great opportunity to join a fast-paced SoC team responsible for RTL Design, flows and methodology...As new projects are coming up, making it wonderful timing to join our team. An ideal candidate will… more
    Qualcomm (02/15/25)
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  • Sr . ASIC Design Engineer, Project…

    Amazon (Redmond, WA)
    …role you will: . Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets. . Define, ... configure and integration SoC Subsystems . Contribute to the SoC ...DFT on the blocks . Perform initial synthesis & timing analysis . Assist verification team in unit verification… more
    Amazon (02/15/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention ... to design and implement the world's leading GPU and SoC 's. With the System- ASIC team, you will...be responsible for the RTL design, logic synthesis, and timing analysis of several modules. + Integrate modules into… more
    NVIDIA (12/11/24)
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  • Senior ASIC Floorplan Design…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's ... leading SoC 's and GPU's. This position offers you a unique...timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical… more
    NVIDIA (02/05/25)
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  • Senior ASIC Design Engineer

    NVIDIA (WA)
    We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC 's and GPU's. This ... Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/ timing clean design. + Collaborate and coordinate with architects, other… more
    NVIDIA (01/30/25)
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  • Senior ASIC Design Engineer

    Tarana Wireless (Milpitas, CA)
    This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products. + Architecture ... circuits using Verilog + Frontend design development and integration of large ASIC designs including: Integration of Processors, Bus, Memory, and Interface IPs +… more
    Tarana Wireless (02/01/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... fully verified design by working closely with verification engineers. + Deliver a synthesis/ timing clean design while working with the physical design team to ensure… more
    NVIDIA (02/04/25)
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  • ASIC Design Engineer, Cloud-Scale Machine…

    Amazon (Cupertino, CA)
    …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/DFT signal routing - As a...signal routing - As a key member of the ASIC design team, you will implement and deliver high… more
    Amazon (02/15/25)
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  • Sr . Staff Design Engineer (Low Power)

    Qualcomm (Santa Clara, CA)
    …volume chip production for at least one product cycle is preferred **Keywords** : ASIC ; SOC ; Low Power; Power estimates; Power Intent; Power Implementation; WiFi ... Technology team you will be working on WiFi (802.11x) technology, SOC Design, Low Power micro-architecture, Power Intent/Implementation, power estimates and power… more
    Qualcomm (01/09/25)
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  • VLSI Design Engineer for Server / Data Center…

    Qualcomm (San Diego, CA)
    …as the PC and the Data Center markets. Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills. Besides solid ASIC and/or ... This is a great opportunity to join a fast-paced SoC team responsible for RTL Design, flows and methodology...new projects are coming up, it is a wonderful timing to join our team and take part in… more
    Qualcomm (02/14/25)
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  • Sr . DDR IP Design Engineer (Silicon…

    SpaceX (Irvine, CA)
    …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer/ Senior : $160,000.00 - $220,000.00/per year Your actual ... Sr . DDR IP Design Engineer (Silicon Engineering) at...cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing… more
    SpaceX (01/19/25)
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  • Senior Electrical Engineer (FPGA Design)

    L3Harris (Camden, NJ)
    …with every other Friday off Job Description: Reporting to the Manager, Engineering ( ASIC /FPGA), the Senior Member of Engineering Staff (SMES) will be part ... Job Title: Senior Electrical Engineer (FPGA Design) Job Code: 19447...the capability to target all FPGA vendors and have ASIC front end capability, with mature design processes. This… more
    L3Harris (12/22/24)
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  • Senior Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Hardware Design Engineer for our Tegra group! NVIDIA is seeking passionate Senior Hardware Design Engineers to architect, design ... and verify the world's leading SoC 's and GPU's. This position offers the opportunity to...architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks. What… more
    NVIDIA (12/10/24)
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  • Senior Digital Circuit Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now hiring for a Senior Logic and Digital Circuit Design Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... as one of the key IPs in many complex SoC . You'll work closely with analog designers and system...define and build constraints for synthesis and drive for timing closure. In addition to RTL design, you'll need… more
    NVIDIA (01/29/25)
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  • Senior Design for Debug Architect…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer! NVIDIA is seeking a DFD Architect to implement hardware and software ... solutions to debug world's leading SoC 's and GPU's. This position offers the opportunity to...and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design, verification, logic synthesis,… more
    NVIDIA (12/12/24)
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  • HBM PHY Expert, Annapurna Labs

    Amazon (Austin, TX)
    …validation of AWS next generation ML Chips, Cards and server integration. As a senior member of our platform development team, you will have the outstanding and ... data in the fleet. Key job responsibilities As a senior member of the team, you will join a...the life A day in the life of an ASIC Engineer on the AWS Organization team focuses on… more
    Amazon (02/12/25)
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