- Meta (Sunnyvale, CA)
- …5. 7+ years of experience as a Performance Architect, Silicon Architect, Subsystem Designer, Validation Engineer for production silicon shipped in volume. ... SoCs. You will collaborate with a world-class group of system, SW, SoC and IP architects, modeling, development, and validation teams, and program/project managers… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC 's and GPU's. This ... computing. What you'll be doing: + As a Senior Verification Engineer at NVIDIA, you will be...verification infrastructure, DV strategies and test-planning for memory subsystem units + Collaborate with ASIC designers and architects… more
- Qualcomm (Santa Clara, CA)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate the ... concepts of CPU and SOC level micro-architectures. You will work on a selected...work on a selected part of the CPU Design Verification to ensure that it functions to the standards… more
- NVIDIA (Austin, TX)
- NVIDIA is seeking an outstanding ASIC Verification Engineer to verify the design and implementation of the world's leading SoC 's and GPU's. This position ... of computing! What you'll be doing: + As a Verification Engineer at NVIDIA, you will be... scope, and contribute to the development of the verification infrastructure for memory subsystem units +… more
- Qualcomm (Santa Clara, CA)
- …stake holders at different levels of test bench + Work closely with Design, Subsystem / SOC teams on failure debugs, code/functional coverage closure + Debug of ... off and required documentation + Debug and root cause SS/ SOC /post silicon issues in collaboration with Design teams +...teams + Expertise in IP level / Sub-system level verification + Understanding of standard bus protocol like AHB,… more
- Qualcomm (San Diego, CA)
- …help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, validate, ... implement, and document IP (block/ SoC ) development for a variety of high performance, high...Responsibilities** + Implement Hierarchical blocks of the DDR/system cache subsystem running the physical synthesis with Synopsys Fusion Compiler.… more
- SpaceX (Redmond, WA)
- Sr. DDR IP Design Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... the ultimate goal of enabling human life on Mars. SR. DDR IP DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and… more
- NVIDIA (Santa Clara, CA)
- …Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the opportunity to have a real impact in ... responsible for the micro-architecture and design implementation of GPU memory subsystem modules. + Make architectural trade-offs based on features, performance… more
- BAE Systems (Westminster, CO)
- …reliability electronic systems. Assignments include designs which will include SOC architectures utilizing soft-core processors, digital filters, image processing ... Modelsim/Questasim. + Ability to work requirements and flow down for system/ subsystem /box/board needs. + Good communication skills as well as excellent presentation… more