- Renesas (Austin, TX)
- Senior Firmware Verification Engineer Job Description Renesas Electronics America is seeking a mid-level PMIC Firmware Verification Engineer to join our ... Effective written and verbal communication. **Preferred Qualifications** + Experience with UVM or other structured verification methodologies. + Familiarity with… more
- Micron Technology, Inc. (Boise, ID)
- …inspiring the world to learn, communicate and advance faster than ever. As a Design Verification Engineer at Micron, you will work with a highly innovative and ... + Basic understanding of CMOS circuit design + Experience in mixed signal verification + Familiar with analog/ digital simulation tools, ie. HSPICE, VerilogHDL,… more
- Micron Technology, Inc. (Minneapolis, MN)
- …methodologies that uphold Micron's standards of excellence. **Position Overview** As a Design Verification Engineer Intern, you will join a highly motivated team ... work alongside experienced engineers and build a strong foundation in ASIC verification . **Responsibilities** + Work with UVM -based SystemVerilog testbenches to… more
- Draper (Boston, MA)
- …Summary: Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification ... and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal... digital and embedded hardware platforms. + Develop verification and test plans + Develop UVM … more
- US Tech Solutions (Goleta, CA)
- …independently and take ownership of verification deliverables within a UVM /SystemVerilog environment. + The engineer will collaborate with design, ... **Job Description:** + The Verification Engineer will contribute to the... prior to tape-out. **Responsibilities:** + Perform pre-silicon functional verification of digital designs using UVM… more
- Northrop Grumman (Linthicum Heights, MD)
- …of your career. We are looking for you to join our team as a Principal Digital Verification Engineer /Senior Principal Digital Verification ... NC. This requisition may be filled as a Principal Digital Verification Engineer or a...complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilogl. +… more
- Snap Inc. (Vancouver, WA)
- …AR + Work closely with digital design, analog logic, software and verification engineers + Develop and implement UVM -based and assertion-based testbenches + ... and working better together. We're looking for a Design Verification Engineer to join the Spectacles Team...knowledge of UVM and SystemVerilog for advanced verification methodologies + Strong knowledge of digital … more
- Northrop Grumman (Jessup, MD)
- …**_This work will be done 100% onsite in Linthicum, MD._** **Basic Qualifications Staff Digital Verification Engineer :** + Bachelor's degree in a technical ... and able to obtain and maintain a security clearance.** **Preferred Qualifications Staff Digital Verification Engineer :** + Advanced Degree either MS or… more
- Broadcom (San Jose, CA)
- …Sign-In before you apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer . In this highly visible role you ... PhD in Electrical Engineering or Computer Engineering with 10+ years of experience in digital design verification + Hands on experience in SV UVM , SV RNM and… more
- Huntington Ingalls Industries (Fort Meade, MD)
- …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... short video: https://vimeo.com/732533072 Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies...etc. * UVM concepts * Directed, constrained-random, and assertion-based … more
- Northrop Grumman (Jessup, MD)
- …engineers to make these technologies a reality. **What You'll Get To Do:** As a Digital Verification Lead Engineer , you will have an opportunity to be ... Test (SEIT) department is seeking a Staff Lead Design Verification Engineer to join our team and...comprehensive test-benches for behavioral simulation + Design and implement verification strategies for complex digital systems +… more
- Northrop Grumman (Jessup, MD)
- …Sr. Principal level. Qualifications for both are listed below:** **Basic Qualifications Principal Digital Verification Engineer :** + Bachelor's degree in a ... Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer :** + Bachelor's degree in a… more
- SpaceX (Irvine, CA)
- Wireless Modem Verification Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... goal of enabling human life on Mars. WIRELESS MODEM VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're...capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC verification at block and system… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Verification Engineer Responsibilities: 1. Develop and execute verification plans ... challenges. 3. Create and maintain testbenches and test cases using industry-standard verification languages and methodologies (eg 4. SystemVerilog, UVM ). 5.… more
- Lockheed Martin (Denver, CO)
- **Description:** Join Our Team as a **ASIC/FPGA Verification Engineer ** where you will work on the development of a sophisticated state\-of\-the\-art avionics ... seeking a highly talented and motivated **ASIC & FPGA Verification Engineer ** who has a passion for...for a given design\. * Use SystemVerilog and Universal Verification Methodology \( UVM \) to verify a design… more
- The Boeing Company (El Segundo, CA)
- …& Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC/FPGA Verification Engineer on the Boeing Electronic Products team you will ... at other sites. **Position Responsibilities:** + Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog. + Develop… more
- BAE Systems (Westminster, CO)
- …may be available based on position level and/or job specifics. **Principal FPGA Verification Engineer - $15K Sign On Bonus** **114981BR** EEO Career Site ... used across multiple projects. + Work in a System Verilog/ UVM environment developing tests, testbenches, UVM components,...(eg Ruby, Python, TCL). + Experience in documentation and verification of high-speed digital electronics, FPGAs, and… more
- Teradyne (North Reading, MA)
- …business results. Opportunity Overview Our Logic Design Engineering team is seeking a digital logic Verification Engineer who preferably also has experience ... field + Minimum of 10+ years of industry experience + Knowledgeable in digital logic verification , preferably using SystemVerilog & Universal Verification … more
- BAE Systems (Nashua, NH)
- …be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **117194BR** EEO Career ... your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop verification environments.… more
- BAE Systems (Cedar Rapids, IA)
- …may be available based on position level and/or job specifics. **Senior Principal Engineer - ASIC/FPGA Verification (Hybrid)** **117726BR** EEO Career Site Equal ... navigation missions. BAE is looking for experienced senior level ASIC/FPGA Design Verification Engineers who can plan, architect, and develop verification … more
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