- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe ... Engineer , you will support the technical presales of DDR IP by generating collateral through simulations, synthesis and...simulations, synthesis and publications. As you grow into more senior roles, you will use your knowledge of different… more
- SpaceX (Sunnyvale, CA)
- Sr. DDR IP Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. SR. DDR IP DESIGN ENGINEER (SILICON ENGINEERING) At...critical milestones COMPENSATION & BENEFITS: Pay range: ASIC/FPGA Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …leaders and innovators who want to make an impact on the world of technology. Senior Principal Design Engineer - Systems and Interfaces San Jose Job Description: ... CSG Central Applications Engineering team seeks an experienced SoC design engineer to integrate and support Cadence IP products in system reference designs. This… more
- NVIDIA (Santa Clara, CA)
- …and self-driving cars that can perceive and understand the world. NVIDIA is seeking a Senior Server Design Integration Engineer to join our team. In this role, ... performance, power consumption and thermal integration + Work closely with AE ( Application Engineering) team to maintain design documentation, test plans and other… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to ... BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)...Multimedia SOCs). + Knowledge of HBM, GDDR, LPDDR, or DDR or related protocols. + You have experience with… more
- Cisco (San Jose, CA)
- What You'll Do: As a Senior Signal Integrity Engineer at Cisco, you will be at the cutting edge of high-speed PCB design. You will define and optimize high-speed ... SerDes interfaces (>50Gbps), DDR interfaces, and system interconnects. Your role will involve...8000 line of routers. These routers are designed with application awareness to make network infrastructure flexible and agile… more
- NVIDIA (Santa Clara, CA)
- …design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior DFT Engineer to join our dynamic and growing team! If you are ... to stand out from the crowd: + Experience with DDR and HBM high speed I/O testing. + Hands...eligible for equity and benefits (https://www.nvidia.com/en-us/benefits/) . NVIDIA accepts applications on an ongoing basis. NVIDIA is committed to… more
- NVIDIA (Santa Clara, CA)
- …for our next generation products for scan architecture, ATPG, MBIST, and IOBIST applications . + You will also help mentor junior engineers on test designs and ... Knowledge of high-speed interface architectures such as PCIe, USB3, DDR is a plus. + Excellent analytical skills in...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- …cars. We are building the most sophisticated SOCs in the world for these applications and are looking for DFX architects to join our growing team of experts. ... quality and meet safety diagnostic requirement for various different applications . What You'll Be Doing: + You will have...of high speed interface architectures such as PCIe, USB3, DDR , UFS, NVME etc. is helpful and understanding of… more