- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for Formal Verification Engineer to help verify the design and implementation of industry's leading CPUs and other High Performance ... Computing Solutions. As a Formal Verification Engineer , you will play a key role in ensuring the functional correctness and completeness of our next… more
- Microsoft Corporation (Mountain View, CA)
- …our world. The Silicon Architecture and Verification team is seeking a ** Senior Design Verification Engineer ** who can work with cross-discipline teams ... The Microsoft Artificial Intelligence Silicon Engineering(AISiE) team is seeking a ** Senior Design Verification Engineer ** to deliver premium-quality… more
- Microsoft Corporation (Mountain View, CA)
- …that will manage and optimize the Cloud infrastructure. We are looking for a ** Senior Design** ** Verification ** ** Engineer ** to join the team. **Microsoft's ... of custom Intellectual Property (IP) components. + Define pre-Si verification (simulation/emulation/ formal proofs/FPGA-testing) and post-Si validation strategies.… more
- Cisco (San Jose, CA)
- …Who You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of ... * Experience with Forwarding logic/Parsers/P4. * Experience with Veloce/Palladium/Zebu/HAPS. * Formal verification (iev/vc formal ) knowledge. * Domain… more
- Amazon (Sunnyvale, CA)
- …block and Sub System level. - Drive block physical implementation through synthesis, formal verification , floor planning, bus / pin planning, place and route, ... edge. Work hard. Have fun. Make history. As a Senior Physical Design Engineer , you will: -...Graphics, Synopsys, or Others) to block design for synthesis, formal verification , floor planning, bus / pin… more
- Vector Atomic (Pleasanton, CA)
- …with SoC designs, such as Zynq, Ultrascale, and/or Arria + Knowledge of formal verification techniques (PSL, SystemVerilog, UVVM, UVM, OVM) + Understanding of ... place for you! Position Summary We are seeking a Senior FPGA Engineer to join our team...HDL coding (Verilog and/or VHDL) for synthesizable RTL and verification + Experience with EDA tools such as Vivado… more
- NVIDIA (Santa Clara, CA)
- …CDR, and offset cancellation + Experience with static timing tools (nanotime, primetime) and formal verification tools + Have a strong background in Perl and ... We are now hiring for a Senior Logic and Digital Circuit Design Engineer...in RTL for mixed-signal blocks; Experience with industry standard verification methodologies, such as UVM + Proven experience with… more
- NVIDIA (Santa Clara, CA)
- …modern C++, build systems, and database. + Experienced with EDA Vendor tools for design, verification and formal analysis. The base salary range is 148,000 USD - ... infrastructure tools used by design engineers for build and verification of architectural, rtl, and gate level designs. As...architectural, rtl, and gate level designs. As a software engineer , you will craft highly efficient software to automate… more
- NVIDIA (Santa Clara, CA)
- …other checks. + Debugging timing violations and implementing functional, Timing ECO's and perform formal verification . What we need to see: + BS (or equivalent ... We are now looking for a motivated Physical Design Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great,… more
- NVIDIA (Santa Clara, CA)
- …threat models, attack-trees, static/dynamic analysis, fuzzing, and negative testing + Experience with formal verification + Passion for your work We are widely ... GPUs. We are searching for an outstanding security software engineer to fill an exciting, yet fun role on...are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want… more
- Cisco (San Jose, CA)
- …the world What You'll Do The Core Hardware Business Unit is looking for a motivated Senior Verification engineer /lead to engage in new development of our UCS ... Forwarding logic/Parsers/P4 * Prior experience with Veloce/Palladium/Zebu/HAPS * Prior experience with formal verification (iev/vc formal ) We Are Cisco… more
- M. C. Dean (San Jose, CA)
- **Security Systems Design Engineer - San Jose, CA** ID **12521** Location **San Jose, CA** Apply Now ... at MC Dean, you will join forces with more than 5,800 professionals who engineer and deploy automated, secure and resilient power and technology systems; and deliver… more