• Senior Mask Layout Design

    NVIDIA (Santa Clara, CA)
    Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a ... in Electrical Engineering (or equivalent experience) + At least 5+ years of hands-on layout design experience + Deep understanding of analog circuit layout more
    NVIDIA (08/16/24)
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  • Senior Photonic Layout Design

    NVIDIA (Santa Clara, CA)
    Are you seeking an outstanding opportunity? We are looking for a Senior Photonic Layout Design Engineer - someone who is excited to join a growing group of ... in Electrical Engineering (or equivalent experience) + At least 5+ years of hands-on layout design experience + Deep understanding of analog circuit layout more
    NVIDIA (06/15/24)
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  • Senior Photonics Design

    Google (Mountain View, CA)
    Senior Photonics Design Engineer,...the Role: The successful candidate would be responsible for photonics integrated circuit design and layout ... high speed data. The Taara Project is seeking a Senior Photonic Test Engineer working on next generation photonic...Five (5) or more years relevant industry experience of photonics integrated circuit design + Experience with… more
    Google (07/31/24)
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  • Senior Photonics Test Engineer,…

    Google (Mountain View, CA)
    Senior Photonics Test Engineer, Project Taara Hardware Engineering Mountain View, CA This is a fixed-term contract position for 12 months About the Team: Project ... high speed data. The Taara Project is seeking a Senior Photonic Test Engineer working on next generation photonic...novel/custom tooling for specialized wafer-level measurements. + Contribute to design and layout of novel on-wafer test-sites… more
    Google (07/17/24)
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  • Senior Photonic Device Designer

    NVIDIA (Santa Clara, CA)
    …next generation of best-in-class products. Our teams focus is on architecture and design of CMOS and Silicon- Photonics high-speed chip interfaces (NVLink, IEEE, ... devices for high-speed optical interconnect and sensing applications. + Conduct chip layout circuit design , circuit checking, and device evaluation and… more
    NVIDIA (08/14/24)
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  • Sr. Signal Integrity Engineer (Boston and Mountain…

    Lightmatter (Mountain View, CA)
    …for high speed interfaces including PCIe and SerDES. + Experience with PCB design and layout considerations for high-speed interfaces, including layer stack-up, ... computers, consider joining the team at Lightmatter! Lightmatter is looking for a Senior Signal Integrity engineer to drive the next generation products from concept… more
    Lightmatter (07/25/24)
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