- Qualcomm (Austin, TX)
- …Group > CPU Engineering **General Summary:** As a CPU Physical Design Methodology Engineer , you will work with implementation and CAD teams ... (RTL, Physical design , Circuits, CAD) to solve key physical design problems in CPU implementations. + Develop innovative techniques in Physical design … more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior CPU Implementation Methodology Engineer to join our VLSI team! If you are looking for a challenging and exciting role and you are ... or MS (or equivalent experience) + 6+ years of CPU design implementation experience + Deep understanding...Ways to stand out from the crowd: + Prior CPU experience in physical implementation methodology +… more
- Qualcomm (Santa Clara, CA)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate ... You will work on a selected part of the CPU Design Verification to ensure that it...based on the Architecture and Micro-architecture. + Develop Verification Methodology , ensuring scalability and portability across environments. + Develop… more
- Qualcomm (Austin, TX)
- …Area:** Engineering Group, Engineering Group > SoC Architecture **General Summary:** As a CPU Performance and Power Analysis Engineer , you will be working on ... 5 years of relevant experience + Fundamentals in PCB design and prototyping + Experience with DAQ automation and...server competitive devices + Respond to requests to measure CPU power-performance data for various workloads and benchmarks +… more
- Qualcomm (Austin, TX)
- …Group, Engineering Group > CPU Engineering **General Summary:** As a DV Infrastructure Engineer focusing on the methodology and support of RTL design ... functional teams and external vendors. Collaborate with both CAD and front-end design teams in productizing solutions to enable faster and more nimble development.… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... emphasis on PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes + Develop flows for advanced place and… more
- quadric.io, Inc (Burlingame, CA)
- …What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical ... design methodologies and automation scripts for multiple ...Electrical Engineering with a minimum of eight years of CPU /GPU/ASIC implementation + Proficiency in TCL scripting + Proficiency… more
- NVIDIA (Santa Clara, CA)
- …and validation techniques. + Develop comprehensive testbenches and models to stimulate the CPU design , including both directed and random stimulus generators. + ... Join our CPU Verification Team to contribute to Design...and strong debugging skills. + Proficiency with UVM verification methodology . + Experience or knowledge with SystemVerilog, SVA, or… more
- Qualcomm (Austin, TX)
- …Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Post SIlicon Power and Performance ... Engineer with a focus on CPUs, you will work...and product definition feedback for the next generation of CPU by closing the loop with real silicon analysis.… more
- Meta (Columbus, OH)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...experience. 8. 5+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification. 9. Track record of… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...experience. 9. 10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification. 10. 10+ years experience… more
- Amazon (Boise, ID)
- …tablets, Fire TV and Amazon Echo. What will you help us create? As a Sr. Design Verification Engineer at Amazon, you will be part of an advanced engineering and ... resolve blocking issues. Key job responsibilities - Define the verification methodology and implement the corresponding test bench infrastructure in advanced HVL… more
- Meta (Menlo Park, CA)
- …SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... and data path IPs, OR Experience in SoC Micro-architecture, Design and Integration, OR Implementation, Power methodology ...14. Experience in data path development 15. Experience in CPU , NOC, Memory and Peripheral Subsystems 16. Experience in… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is hiring a Senior Design Engineer to design , analyze, and evolve next generation SoC solutions. We are looking for special individuals with passion ... with Architects, Chip Leads, and Customers on SOC IP design , development, timing closure, power analysis, methodology ...of relevant work experience in RTL development focused on CPU , GPU, and HPC architectures. + Proficiency in industry… more
- Meta (Menlo Park, CA)
- …SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...8. Experience in data path development. 9. Experience in CPU , NOC, Memory and Peripheral Subsystems. 10. Experience with… more
- Meta (Menlo Park, CA)
- …SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...10. Experience in data path development 11. Experience in CPU , Network protocols, NOC, Memory and Peripheral Subsystems 12.… more
- Qualcomm (Santa Clara, CA)
- …using ARM IPs. Experience in SoC low power micro-architecture, low power design and methodology , Power Intent/Implementation, power estimates, power analysis ... is preferred + Experience in PCIE/USB peripherals is preferred + Experience in CPU sub system-based design is preferred + Experience in low power design from… more
- NVIDIA (Santa Clara, CA)
- …SOC integration design / flow experience + Hold a basic sense of verification methodology + Good understanding of ASIC design flow including RTL design , ... to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the...stand out from the crowd: + Familiarity with ARM CPU and SoC system architecture, microprocessor, and microcontroller fundamentals… more
- Qualcomm (Santa Clara, CA)
- …Group, Engineering Group > CPU Engineering **General Summary:** As a CAD Engineer focusing on the DV & Emulation methodology and support, you will ... work with RTL, architecture, design , DV, software and silicon verification users. Interfaces with...you will own Hardware Emulation methodologies and workflow for CPU and SOC teams. + Gather requirements from users… more
- Qualcomm (Santa Clara, CA)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CAD Engineer focusing on the methodology and support of RTL design ... Responsibilities + Work with chip leads to understand the design methodology and high level requirements in...develop and verify critical high performance and low power CPU designs. * Anticipates, identifies, and solves highly complex… more