- NVIDIA (Santa Clara, CA)
- …design and/or timing closure experience with successful tapeouts. + Expertise in Static Timing Analysis and prior working experience with STA tools ... you will be doing: + Drive robust methodology for timing analysis of custom circuit IP. +...identify improvements and solutions and deploy newer features. + Lead implementation of STA solutions for multiple circuit design… more
- Cadence Design Systems, Inc. (Austin, TX)
- … analysis , place and route, extraction, spice etc. Job Responsibilities: . Perform Static timing analysis , glitch, noise analysis , extraction using ... RC Extraction, power and UPF/CPF concepts. . Execute and lead Tempus timing signoff campaigns at existing...VLSI, Semiconductor, Electrical or Computer Engineering. + Expert in Static Timing Analysis with knowledge… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Equivalence Checking Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required. Good hands-on ... Signoff including Synthesis, Place and Route, Design Closure, and timing /power signoff, RTL to GDSII. Lead technical...experience of Floorplanning , Place and Route, Timing analysis and Sign-off, preferable with CDNS… more
- Cisco (San Diego, CA)
- …experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, Test static timing analysis constraints development and timing closure, ... Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test. You will...in the creation of Innovative Hardware DFT & Test timing analysis for new silicon device models,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …skilled and motivated candidates with backgrounds in logic synthesis, word-level synthesis, static timing analysis , computer architecture, verification, RTL ... large software development projects is highly recommended + Prior experience with timing analysis software development projects is highly recommended The annual… more
- NVIDIA (Santa Clara, CA)
- …ADC etc. + Hands on experience running Spice simulations, EM/IR analysis , and static timing analysis /closure + Experience with spice simulation for noise ... challenging and exciting role in improving the netlist and timing quality of our designs and if you are...of Nvidia's next generation products by performing detailed transistor-level analysis on the design. + Drive the design and… more
- IERUS Technologies, Inc. (Huntsville, AL)
- …designs using RTL & Logic Synthesis methods (Verilog, VHDL, SystemVerilog). * Use modern Static Timing Analysis and Formal Verification tools to verify the ... and the latest Xilinx and Synopsys EDA tools. The individual will lead architectural design, RTL coding, synthesis, hands-on implementation and verification of… more
- Cadence Design Systems, Inc. (Austin, TX)
- …industry experience. Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required. Prior experience ... communication skills. Preferred Good hands-on experience of Floorplanning , Place and Route, Timing analysis and Sign-off, preferable with CDNS tools suite Prior… more
- Honeywell (Plymouth, MN)
- …in multi-disciplinary teams + Background in BIST, Design For Test (DFT), physical synthesis, static timing analysis , and/or power analysis . + Direct ... participate on project reviews and audits. Key Responsibilities + Lead efforts to map customer designs into Honeywell's ASIC...to map customer designs into Honeywell's ASIC technology + Timing constraints + Simulation + Conduct Code Synthesis +… more
- Cisco (San Jose, CA)
- …DFT CAD development - Test Architecture, Methodology and Infrastructure * Background in Test Static Timing Analysis * Past experience with Post silicon ... Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus...include, System Verilog Logic Equivalency checking and validating the Test- timing of the design * Knowledge of the latest… more
- City of New York (New York, NY)
- …Sections. The Reliability Centered Maintenance Engineer will provide technical lead responsibilities for the day-to-day implementation of the Reliability Centered ... Facilities SCADA systems, the WRRF SCADA system(s) and network of mobile and static sensors (vibration, IR, pipe thickness, etc.). For the assigned facilities, the… more
- Meta (Sunnyvale, CA)
- …and circuit techniques 10. 2. Verilog or VHDL 11. 3. Logic design and synthesis 12. 4. Static Timing Analysis 13. 5. C, C++, Java, Ruby or Perl 14. 6. ... (PPA) working cross-functionally with IP, Design, Implementation, Software, and Product. 4. Lead logic development, develop RTL and drive chip level integration. 5.… more
- Micron Technology, Inc. (Minneapolis, MN)
- …+ IP integration, + Clock tree design, + Place-and-route, + Constraint reviews, + Static timing analysis and signoff, + Physical verification, + Functional ... and timing ECOs. **What you will be doing Daily** +...with Cadence Tools (Genus/Innovus/Tempus) and Mentor (Calibre). + Chip Lead experience. As a world leader in the semiconductor… more
- CDM Smith (Dallas, TX)
- …codes and application to design situations. - Strong theoretical background in static and dynamic analysis of hydraulic structures and appurtenances with ... gates, outlet works, diversion structures, cofferdams, floodwalls, and canals. - Lead project teams of structural engineers and coordinate with multi-disciplinary… more
- NVIDIA (Santa Clara, CA)
- …required. + Hands on experience running Spice simulations, EM/IR analysis , and static timing analysis /closure is required. + Basic understanding and ... generation products through custom circuit solutions and detailed transistor-level analysis . + Create prototypes of patentable ideas on test...the entire line of products. + Be a mentor/technical lead for junior team members. What we need to… more
- Ford Motor Company (Sunrise, FL)
- …this position ** As an ADAS Embedded Software Performance Engineer, you will Lead the performance measurement, analysis , reporting, and optimization of the ... Linux/QNX embedded systems + Create performance measurements dashboards containing timing information, resource consumption information, and trends + Define… more
- BAE Systems (Totowa, NJ)
- …+ Familiarity with revision control (git, cvs, clearcase, subversion, etc.) + Familiarity with static timing analysis + Working knowledge of internal logic ... multiple growth paths for the individual, technically or otherwise - Technical Lead on future or current programs, Control Account Manager, or Functional Manager.… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …physical design flows including RTL Synthesis, floorplan, P&R, high performance clock-tree synthesis, static Timing analysis and closure, DFT, Low power ... collaborative and creative people to join this exciting growth opportunity and help us lead the industry with Cadence IP products for silicon solutions. Do you want… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …in writing and debugging RTL (Verilog, System Verilog). + Experience in RTL synthesis and static timing analysis is required. + Strong written and oral ... + Write documentation, application notes, and system design and verification examples. + Lead the evaluation, review, and advanced usage of new products for release.… more