- NVIDIA (Santa Clara, CA)
- NVIDIA is hiring a Senior Design Engineer to design , analyze, and evolve next generation SoC solutions. We are looking for special individuals with ... Chip Leads, and Customers on SOC IP design , development, timing closure, power analysis, methodology alignment, and program execution to ensure pre-silicon… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC /ASIC Physical Design Engineer ... team to drive architectural feasibility studies, develop timing, power and area design targets, and explore ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC /ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- NVIDIA (Santa Clara, CA)
- …design and methodologies. What you'll be doing: + Be an integral part of the SOC Design team to develop and improve our RTL top-level assembly process and ... day-to-day interaction with front-end RTL unit designers, back-end physical design engineers, DFT engineers, power architects, software...years of shown relevant industry work experience in chip design , specializing in SOC integration and … more
- General Motors (Warren, MI)
- …experience in hardware design and development + Deep understanding of automotive SoC architecture, memory hierarchy, and ASIC design flow. + Knowledge of ... strong partnerships with internal and external stakeholders, guiding electronics design , and ensuring optimal semiconductor selections for GM applications. This… more
- Meta (Sunnyvale, CA)
- …from transistors, through architecture, to firmware, and algorithms.We are seeking an SoC Modeling ASIC Engineer to support C++/Python modeling and software ... and mapping software pipelines to the dedicated hardware accelerators. **Required Skills:** SoC Modeling ASIC Engineer Responsibilities: 1. Analyze the software… more
- SpaceX (Irvine, CA)
- … intent verification and post synthesis timing validation flows + Execute low power design and physical synthesis, deploying knowledge of unified power ... Sr. SOC /ASIC Timing Signoff & Front-End Implementation Engineer...closely with chip architecture, design verification, physical design , DFT, and power teams to achieve… more
- Qualcomm (San Diego, CA)
- …5 years of experience is required and proficiency in handling tools such as Design compiler, Fusion compiler, Primetime, Conformal low power , LEC. Scripting ... + Work closely with RTL design , physical design teams to optimize area, performance and power...design constraints to achieve timing closure of complex soc cores. + Tabulate metrics results for QOR comparison.… more
- Citigroup (Fort Lauderdale, FL)
- …tools and services to the Security Operations Center. In this role, you will design , support, engineer solutions that better align to Security Operations Center, ... operations, end to end services including product certification, engineering, design , following internal Citi standards. + Troubleshooting of the infrastructure,… more
- Lightmatter (Boston, MA)
- …project brings together our experts in Software, Photonics, Systems, Packaging, Networking, and SoC Design to solve key design challenges in building ... extreme-scale artificial intelligence computing clusters. If you're a collaborative engineer or scientist who has a passion for innovation,...experience in compute ASIC architecture with an emphasis on low- power design + 5+ years of experience… more
- ManpowerGroup (Phoenix, AZ)
- … integrity analysis at block and top level, including EM, IR & ESD analysis, and power reduction techniques in SOC design + Power constraints generation ... **Job Title:** **Physical Design - Power Integrity Flow Development Engineer... analysis in vector and vector-less modes of ASIC SoC design at various design … more
- Meta (Sunnyvale, CA)
- …exposure to power modeling, developing flows around EDA tools, and low- power design to build efficient System on Chip ( SoC ) and IP for data center ... applications. **Required Skills:** ASIC Engineer , Power Responsibilities: 1. Work with Architecture and ...models at SoC and system level 15. Low- power design techniques such as clock-gating, … more
- NVIDIA (Santa Clara, CA)
- …integral in overseeing the entire lifecycle of SoC Performance and Power Management software, including proof of concept, design , architecture, algorithm ... Engineer to join our System Performance and Power Management Software team. This team is responsible for...to stand out from the crowd: + Architecture and design experience in SoC software power… more
- ManpowerGroup (Redmond, WA)
- Hardware Design Engineer (UPF & Power... analysis and optimization, UPV files at block and SoC levels, strong understanding of Power Intent ... technology client is seeking a Hardware Design Engineer expert in UPF & Power Intent...of overall experience + Creating UPF files at block, SoC levels + Strong understanding of Power … more
- Qualcomm (San Diego, CA)
- …methodology for power projections for compute games for next generation GPU/ SOC sizing. + Be engaged and contribute to competitive perf/ power analysis ... **General Summary:** Qualcomm is one of the largest fabless design companies in the world provides hardware, software and...or PhD + 10+ years of relevant experience + SOC level power analysis as well as… more
- NVIDIA (Santa Clara, CA)
- …new features and solutions. Ways to stand out from the crowd: + Architecture and design experience in SoC software power management and optimization. + Prior ... Engineer to join the GPU System Perf and Power Management Software team. The team oversees end-to-end ...the market. What you will be doing: + Define, design , develop, and tune SoC and Platform… more
- Qualcomm (San Diego, CA)
- …- Bachelor's degree in Science, Engineering, or related field. - 7+ years of power design , power management & power architecture experience. ... smarter, connected future for all. As a Qualcomm GPU Engineer , you may architect, design , implement, verify,...requirements for maximizing PPA under high performance constraints - SOC & Chipset Power , Thermal, Reliability &… more
- Qualcomm (Austin, TX)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Post SIlicon Power and Performance Engineer with a focus on CPUs, you will work ... power consumption of a CPUs in a complex SoC system. You will help set up methodologies, develop...on time + Work closely with supporting teams in design , architecture, emulation, firmware, design verification and… more
- Meta (Austin, TX)
- …hand-off and integration of blocks into larger SOC environments. 7. Assist with performance/ power analysis of the design and help meet the power ... **Summary:** As a Digital Design Engineer at Meta Reality Labs,... integration and ASIC architecture. 18. Experience with low power design and optimization, including UPF flow.… more
- Randstad US (Redmond, WA)
- hardware design engineer . + redmond , washington + posted 5 days ago **job details** summary + $93.33 - $103.91 per hour + contract + bachelor degree + category ... occupations + reference1066528 job details job summary: A Hardware Design Engineer is needed for an American...Proficiency in creating UPF files at various levels (block, SoC , etc.). + strong understanding of power … more
- Qualcomm (Santa Clara, CA)
- …help create a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design , optimize, verify, validate, implement, and ... design , optimize, verify, validate, implement, and document IP (block/ SoC ) development for a variety of high performance, high...design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit… more