• FPGA Verification Engineer

    Actalent (Denver, CO)
    Job Title: FPGA Verification Engineer - UVM Job Description The Simulation Verification phase includes design, development, and delivery of the ... verification and update the VCRM based on baselined FPGA requirements. + Evaluate current FW test methods for...update the plan as needed. + Evaluate current FW UVM test bench environment for verification and… more
    Actalent (09/06/24)
    - Save Job - Related Jobs - Block Source
  • Engineer II - FPGA

    BAE Systems (Westminster, CO)
    …recognition awards. Other incentives may be available based on position level and/or job specifics. ** Engineer II - FPGA Verification - $10K Sign On Bonus** ... used across multiple projects. + Work in a System Verilog/ UVM environment developing tests, testbenches, UVM components,...regressions/testlists. + Be responsible for generating and executing the FPGA Verification Test Plan and FPGA more
    BAE Systems (09/04/24)
    - Save Job - Related Jobs - Block Source
  • Senior FPGA Design Engineer

    BAE Systems (Westminster, CO)
    …digital electronics, FPGAs, and embedded processor systems. + Experience with OVM/ UVM Verification methodologies. + Experience developing specifications, cost, ... may be available based on position level and/or job specifics. **Senior FPGA Design Engineer ** **101791BR** EEO Career Site Equal Opportunity Employer.… more
    BAE Systems (09/11/24)
    - Save Job - Related Jobs - Block Source