• Sr Principal Design Engineer - SoC Systems

    Cadence Design Systems, Inc. (Austin, TX)
    …IP integration and SoC designs with caches, memory subsystems, and DMA. + Design and verification experience with DDR controller designs and DDR protocols. + ... our products. The CSG Central Applications Engineering team seeks an experienced SoC design engineer to integrate and support Cadence IP products in system reference… more
    Cadence Design Systems, Inc. (05/31/24)
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  • Principal Design Engineer

    Cadence Design Systems, Inc. (Austin, TX)
    …solutions for the latest DDR controller features and customer requirements + Design RTL in a highly configurable and automated environment + Work in ... opportunity to join a development team designing state-of-the-art DDR memory controllers to be used in a wide range...of 5 years of experience required + Background in RTL design including Verilog, synthesis, lint, formal… more
    Cadence Design Systems, Inc. (07/03/24)
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  • SoC Infrastructure IP System HW Architect

    Qualcomm (Austin, TX)
    …/ chiplet architectures + Experience with Performance modeling and validation + Experience with RTL design and complete design flow + Ability to quickly ... Qualifications** + Strong knowledge in SOC infrastructure IP (NOC, Caches, SMMU, Memory Controller , Interrupt Handler) + Strong knowledge in Platform System… more
    Qualcomm (04/04/24)
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