• Sr Principal Digital Timing

    Cadence Design Systems, Inc. (Austin, TX)
    …the world of technology. Provide technical support and customization of timing closure , analysis and ECO flows; spanning digital block, die and 3DIC ... adoption and proliferation of Cadence tools and technologies Requirements; 10+ years timing closure , analysis and ECO flows; spanning digital block, die and… more
    Cadence Design Systems, Inc. (10/30/24)
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  • Digital IC Implementation, Principal

    Cadence Design Systems, Inc. (Austin, TX)
    …or related field 8+ years of design/EDA experience Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is ... backend EDA tools including Synthesis, Place and Route, IR Drop, backend design timing and power closure Experience in scripting languages such as… more
    Cadence Design Systems, Inc. (10/05/24)
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  • Senior Principal FPGA Design Engineer

    BAE Systems (Austin, TX)
    …generation and design architecture, ownership of RTL coding, synthesis, place and route, timing closure , basic test bench development, lab testing and debug, and ... **Job Description** BAE Systems is seeking a Senior Principal FPGA Design Engineer! See what you re missing. Our employees work on the world s most advanced… more
    BAE Systems (10/30/24)
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  • Director Physical Design

    Microsoft Corporation (Austin, TX)
    …of experience in RTL-to-GDS tasks such as floorplanning, bump planning, synthesis, timing closure , place-and-route, electromigration & voltage drop, and physical ... everyone can thrive at work and beyond. **Responsibilities** + ** Principal Physical Design, responsible for:** + Providing technical direction...: + **Soft IP Projects** : Ensure IPs meet timing , power, and area targets. + **Test Chips** :… more
    Microsoft Corporation (11/06/24)
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