• Design Verification (DV) Engineer

    Cisco (San Jose, CA)
    …the ASIC in deployment-mode applications * You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. ... more
    Cisco (01/24/25)
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  • Senior Design Verification (DV)…

    Cisco (San Jose, CA)
    …being developed in the industry. What You'll Do You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. ... more
    Cisco (01/07/25)
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  • FPGA Verification Engineer, Kuiper…

    Amazon (Sunnyvale, CA)
    …Engineering, related discipline, or equivalent experience * 5+ years of experience in FPGA / ASIC design verification * Experience planning, developing, ... more
    Amazon (01/04/25)
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  • Senior Memory Controller Verification

    NVIDIA (Santa Clara, CA)
    …need to see: + BS / MS or equivalent experience. + 5+ years of hands-on ASIC verification of challenging design units over multiple projects displaying good ... more
    NVIDIA (01/29/25)
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  • Technical Program Manager, ASIC

    Meta (Menlo Park, CA)
    …details to big picture 12. Experience in managing ASIC design flow (architecture, micro-architecture, RTL, Synthesis, functional verification , physical ... more
    Meta (01/30/25)
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  • Technical Program Management, Leader - ASIC

    Cisco (San Jose, CA)
    …successful products. * Prior experience in managing ASIC design flow (architecture, micro-architecture, RTL, Synthesis, functional verification , physical ... more
    Cisco (01/16/25)
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  • ASIC Physical Design Engineer…

    Amazon (Cupertino, CA)
    …for in the United States. In Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but across the industry. The work we ... more
    Amazon (01/03/25)
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  • Design Verification Engineer…

    SpaceX (Sunnyvale, CA)
    …the performance and capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at block and system level ... more
    SpaceX (01/31/25)
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  • Applications Engineer Consultant Functional…

    Siemens Digital Industries Software (Fremont, CA)
    …for candidates who like to interact with and influence others, possess strong design and/or verification background, requiring both in depth knowledge of HDL ... more
    Siemens Digital Industries Software (02/07/25)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    **Summary:** We are growing our ASIC Design and uArchitecture team within RL and are seeking engineers at all levels who will work with a world-class group of ... more
    Meta (01/30/25)
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  • Sr. DDR IP Design Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC / FPGA Design Engineer/Senior: $170,000.00 - $230,000.00/per year Your ... more
    SpaceX (01/19/25)
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  • Manager II, Silicon Digital Design

    Google (Mountain View, CA)
    …Cores, Buses/Fabric/NoC, Debug/Trace, Interrupts, or Clocks/Reset. + Knowledge of ASIC Verification , DFT, synthesis, STA, or Physical Design . + Knowledge of ... more
    Google (01/21/25)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    …implementation. 16. SystemVerilog OVM/UVM experience. 17. Experience in SoC integration and ASIC architecture. 18. Experience with low power design and ... more
    Meta (01/30/25)
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  • Senior Silicon Digital Design Engineer

    Google (Mountain View, CA)
    design concepts, and languages such as Verilog or SystemVerilog. + Experience with ASIC design methodologies for clock domain checks, reset checks and low ... more
    Google (12/10/24)
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  • Staff Hardware Systems Design Engineer,…

    Google (Sunnyvale, CA)
    …with Product teams to ensure that goals are met with systems and will work with ASIC / FPGA , Software, and Verification teams to ensure proper verification ... more
    Google (02/05/25)
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  • Software Engineer II

    Cadence Design Systems, Inc. (San Jose, CA)
    …to bridge and gate -keep the full integration, validation, and characterization of ASIC , HW/PCB, SW, FW, and FPGA subsystems in the whole development cycle. ... more
    Cadence Design Systems, Inc. (02/06/25)
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  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …thesis in a relevant area. + Ideally you are a solid contributor in the FPGA or ASIC prototyping/synthesis/ verification space and have delivered great QoR on ... more
    Cadence Design Systems, Inc. (12/31/24)
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  • High-Level Synthesis Technologist

    Siemens Digital Industries Software (Fremont, CA)
    Design with High-Level Synthesis or traditional RTL synthesis + Direct hands-on ASIC or FPGA hardware design experience targeting algorithmic applications ... more
    Siemens Digital Industries Software (01/11/25)
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  • DSP Architect

    Broadcom (San Jose, CA)
    …**Job Description:** This position requires a combination of strong algorithmic knowledge, ASIC design skills, and low-power optimization expertise to deliver ... more
    Broadcom (02/11/25)
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