- NVIDIA (Santa Clara, CA)
- We are now looking for an ASIC Design Efficiency Engineer . NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... to extend the state of the art performance and efficiency . + Understand the design and implementation,...art performance and efficiency . + Understand the design and implementation, develop methodology and infrastructure to drive… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design ...expertise to identify and implement improvements in the current design flow and methodologies to improve efficiency … more
- Qualcomm (Santa Clara, CA)
- …a closely related field is preferred + 5+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... , Computer Engineering, or a closely related field + 5+ years of experience with ASIC design and verification tools, techniques, and methodology + 5+ years of… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , EDA Infrastructure Responsibilities: 1. Front End implementation flow ... support. 4. Internal tools development and automation to help improve productivity across ASIC design cycles including but not limited to RTL generation tools,… more
- Google (Sunnyvale, CA)
- …hardware experiences, delivering unparalleled performance, efficiency , and integration. As an ASIC Physical Design Engineer on the Chip Implementation ... field, or equivalent practical experience. + 5 years of experience in ASIC physical design and methodologies in advanced process nodes. + Experience with place… more
- Cisco (San Jose, CA)
- …and UVM methodology, with experience working in C++, scripting, as well as ASIC design and verification flow. * Defining and building UVM/SystemVerilog ... for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers...in products. Your Impact: You are a hard-working, motivated ASIC verification engineer who will be joining… more
- Amazon (Sunnyvale, CA)
- …robot. What will you help us create? As an ASIC Methodology / CAD engineer you will create and maintain automated design flows that improve the efficiency ... and design quality of the finished ASIC products. Key job responsibilities - Develop automated flows...responsibilities - Develop automated flows for improving the SoC design process - Build robust, scalable tools that help… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Emulation Responsibilities: 1. Develop emulation testbenches in System ... **Summary:** Meta is hiring ASIC Emulation Engineers within our Infrastructure organization. We...SOC interfaces. 7. Develop emulation validation components for validation efficiency in testing, debug and automation. 8. Develop and… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our ... efficiency + You are expected to understand the design and implementation, develop power metrics and drive power...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position ... team of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We focus relentlessly on Infrastructure improvement so that… more
- Broadcom (San Jose, CA)
- …Ethernet solutions that deliver unprecedented performance at critically important power efficiency ._** **_We are looking for highly skilled and efficient Constrained ... Random Design Verification engineers that want to verify new designs...of devices. The candidate will work with our worldwide design and architecture teams to develop leading edge products.… more
- Qualcomm (Santa Clara, CA)
- …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... and methodology. Involve in developing automation to improve verification efficiency . **Qualifications:** + DV experience using uvm/assertion based verification… more
- Qualcomm (Santa Clara, CA)
- …Summary:** As a Design Verification Lead, you will lead a team of ASIC design verification engineers to verify IP and Subsystems that be integrated in ... and emulation strategies) to continuously push the quality and efficiency of test benches + Act as a technical...Science, Engineering, or related field and 6+ years of ASIC design , verification, validation, integration, or related… more
- Cisco (San Jose, CA)
- …and Application Engineer you will be responsible for : * ASIC Bringup, Test plan development, and Post silicon validation. * Understand the microarchitecture, ... - Routers, Switches, Schedulers, Buffers, Traffic Manager etc. * Experience with ASIC micro-architecture and design , Silicon bring-up, and Post silicon… more
- Meta (Sunnyvale, CA)
- …accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital uArchitecture and ... architecture, firmware, and algorithms.We are growing our Machine Learning ASIC Design and uArchitecture team within RL...experience. 7. 8+ years of experience as a Hardware Design Engineer for production silicon shipped in… more
- Meta (Sunnyvale, CA)
- …accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital uArchitecture and ... architecture, firmware, and algorithms.We are growing our Machine Learning ASIC Design and uArchitecture team within RL...Qualifications: 6. 5+ years of experience as a Hardware Design Engineer for production silicon shipped in… more
- Google (Mountain View, CA)
- …) design methodologies for clock domain checks, reset checks and low power design . + Experience in ASIC design flows and methodologies. + Knowledge ... Debug/Trace, Interrupts or Clocks/Reset. + Knowledge of high performance and energy efficient design techniques. + Knowledge of ASIC Verification or Design … more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical Operation team to support the development of ... create as part of a world-class engineering team. **Required Skills:** Silicon Packaging Design Engineer Responsibilities: 1. Perform package design for… more
- Google (Sunnyvale, CA)
- …experiences, delivering unparalleled performance, efficiency , and integration. As a Circuits Design Engineer , Clock Design you will collaborate with the ... clock verification, and signoff. Preferred qualifications: + Experience in ASIC physical design , physical design ...Preferred qualifications: + Experience in ASIC physical design , physical design flows, and methodologies including… more
- Meta (Sunnyvale, CA)
- …then the silicon architecture for it. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital uArchitecture and ... and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom...experience. 8. 3+ years of experience as a Hardware Design Engineer for production silicon shipped in… more