• Senior Synthesis Flow

    NVIDIA (Santa Clara, CA)
    …methodologies + Build flows for methodologies incorporating logic/physical synthesis , design planning, equivalence checking for industry-leading chip designs ... of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis , physical design, formal equivalence checking. + Proven track record developing flows… more
    NVIDIA (03/18/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design, verification, logic synthesis and timing ... We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC...micro-architecture, implement in RTL, and deliver a fully verified, synthesis /timing clean design. + Collaborate and coordinate with architects,… more
    NVIDIA (03/12/25)
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  • Senior ASIC STA Engineer

    Cisco (San Jose, CA)
    …noise, while managing ECO tasks. *Your role may include extraction and STA flow development , convergence strategies, and correlation between PNR, Spice, and STA, ... methodologies, guidelines, and checklists to streamline STA work, resolve design and flow issues, and drive execution to ensure progress and accuracy. *Experience in… more
    Cisco (01/25/25)
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  • Senior ASIC Physical Design Engineer,…

    NVIDIA (Santa Clara, CA)
    synthesis at either block or full-chip level, at project execution and/or flow development . + Strong experience in full-chip/sub-chip Static Timing Analysis ... asynchronous checking including clock domain crossing checks and MTBF analysis, logic synthesis , netlist quality checks, etc. + Help in all aspects of physical… more
    NVIDIA (02/22/25)
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  • Senior ASIC Physical Design Engineer - High…

    NVIDIA (Santa Clara, CA)
    …+ Knowledge of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely considered to be the leader ... CPUs and GPUs. + Explore design space, create optimum floorplan, drive synthesis , physical implementation, and timing closure by understanding arch/logic as well as… more
    NVIDIA (01/08/25)
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  • Senior Physical Design CAD Manager

    Google (Mountain View, CA)
    …. + Lead and mentor a team of physical design engineers. + Drive the development and execution of the physical design flow , from netlist to GDSII. + ... integration. We are seeking a highly experienced and motivated Senior Physical Design CAD Manager to lead our physical...to lead our physical design team and drive the development of advanced integrated circuits. In this role, you… more
    Google (03/06/25)
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  • Senior Hardware Engineer, Physical Design…

    Google (Mountain View, CA)
    …highly motivated Hardware Engineer to join our team and contribute to development of groundbreaking silicon for machine learning acceleration. About us: Artificial ... closure. + Perform block level physical implementation steps including synthesis , floorplanning, place and route, power/clock distribution, congestion analysis, STA,… more
    Google (01/16/25)
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  • Senior Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Hardware Design Engineer for our Tegra group! NVIDIA is seeking passionate Senior Hardware Design Engineers to architect, design ... and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis , timing and back-end teams to accomplish your tasks. What we… more
    NVIDIA (03/11/25)
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  • Senior ASIC Design Engineer - Memory…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to ... be responsible for the micro-architecture and design including RTL design, synthesis , functional verification and timing analysis using groundbreaking CAD tools and… more
    NVIDIA (02/13/25)
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  • Senior Design for Debug Architect…

    NVIDIA (Santa Clara, CA)
    …and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design, verification, logic synthesis , timing analysis and ... We are now looking for a Senior Design for Debug (DFD) Architect and Methodology...work experience. + Experience in Computer Architecture and RTL development (Verilog), focused on arbiters, scheduling, synchronization & bus… more
    NVIDIA (03/13/25)
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  • Sr. SOC/ASIC Physical Design Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …engineering or computer science + 5+ years of ASIC and/or physical design flow development experience in industry PREFERRED SKILLS AND EXPERIENCE: + Strong ... and capabilities of the Starlink network. RESPONSIBILITIES: + Perform partition synthesis and physical implementation steps (eg synthesis , floorplanning,… more
    SpaceX (03/04/25)
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  • Sr. RTL Design Engineer, Hardware Compute Group

    Amazon (Sunnyvale, CA)
    Description Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a ... will you help us create? The Role: As a Senior RTL Design Engineer, you will be part of...to architect and implement complex functional block that enable development of world-class hardware devices. In this role, you… more
    Amazon (03/21/25)
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  • DSP or Serdes RTL Lead Digital Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …Understanding impacts of analog and mixed-signal design and verification on digital-on-top development flow . + Exhibit excellent communication skills and be ... + Understanding synthesis timing constraints, static timing analysis and constraint development + Understanding of fundamental physical design flows and stages +… more
    Cadence Design Systems, Inc. (02/06/25)
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  • Sr. Design Engineer

    Micron Technology, Inc. (San Jose, CA)
    …microcode development , and verification methodologies. + Experience with APR flow , Top integration, and Scripting. + A creative approach with strong ... technology in a collaborative and inclusive environment. **Responsibilities** As a Senior Design and Verification Automation Engineer in the Design Automation group,… more
    Micron Technology, Inc. (03/07/25)
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  • Principal Physical Design Engineer (Icb5)

    Broadcom (San Jose, CA)
    …and dynamic IR drop analysis, signal and power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal ... features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer, the ideal candidate will be responsible for the 3nm… more
    Broadcom (03/20/25)
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