- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or ... techniques to optimize RTL code, performance and power as well as low-power design techniques. + Experience working with microarchitecture or design of… more
- Meta (Menlo Park, CA)
- …the entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Enablement team team, you will be ... innovative ASIC solutions for Meta's data center applications. **Required Skills:** ASIC Engineer - Infra Silicon Enablement Responsibilities: 1. Work across… more
- Meta (Menlo Park, CA)
- …entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Silicon Lifecycle Engineering team, you will be part ... The role also involves partnering with Full Stack Software, Hardware, ASIC Design , Verification, Emulation, Pre/Post-Silicon Validation & Systems teams… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Micro-architecture development ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class Inference and… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical Operation team to support the development of ... create as part of a world-class engineering team. **Required Skills:** Silicon Packaging Design Engineer Responsibilities: 1. Perform package design for… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is seeking a versatile Hardware Engineer to join our Accelerator Design team. Our mission is backed by a massive hardware infrastructure. Our ... our cutting-edge data centers, affecting billions of users. **Required Skills:** Hardware Engineer (Accelerator Design ) Responsibilities: 1. Specify, design ,… more
- Lightmatter (Mountain View, CA)
- …fast and efficient inference and training engines. We are hiring a Sr. Staff Digital Design Engineer to help lead ASIC development for the next-generation ... of 2 years of related experience + Experience/Exposure in ASIC design tape-outs + Exposure to high-speed...design , accelerators, and/or memory hierarchies + Knowledge of machine learning algorithms + Strong communication skills and a… more
- quadric.io, Inc (Burlingame, CA)
- …accelerators in the industry today that can only accelerate a portion of a machine learning graph, the Quadric GPNPU executes both NN graph code and conventional C++ ... What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical design … more
- Meta (Menlo Park, CA)
- …and remote teams and suppliers, to define product roadmap and program. 2. Specify, design , and develop CPU/GPU/ ASIC based compute hardware solutions, and ASIC ... **Summary:** Meta is seeking a versatile Hardware Engineer to join our Compute Hardware team. Our...Support hyper-scale deployment and obtain learning for next generation design . 5. Collaborate with open source hardware community to… more
- Meta (Menlo Park, CA)
- …software and hardware technologies for AI at datacenter scale. Hardware Systems Engineer in RTP work closely with HW/SW co- design teams, hardware ... **Summary:** Meta is seeking a Hardware Systems Engineer to join our Release to Production (RTP)...work experience in one or more domains such as: ASIC development (Silicon design or bringup or… more
- Meta (Menlo Park, CA)
- …have been contributed to the Open Compute Project. **Required Skills:** Hardware Engineer , Power Responsibilities: 1. Specify, design , and develop power delivery ... billions of users. Meta is seeking a passionate Electrical Engineer to join our Power Systems team.Our team is...ASIC and/or FPGA, and related schematic and PCB design 9. Experience with analyzing and resolving power delivery… more
- Siemens Digital Industries Software (Fremont, CA)
- … design and systems companies for cutting edge semiconductor chip design in edge computing/automotive/ machine learning/wireless design /video, image ... **Req ID:** 405647 Company: Siemens EDA Job Title: Software Engineer - Principal Job Reference #: 405647 Job Location:...skills. **Technical Skills (Desirable) :** + Understanding of digital design for ASIC or FPGA. Hardware architecture… more
- Meta (Menlo Park, CA)
- …reliability, scalability, and efficiency. **Required Skills:** Data Center Network Engineer Responsibilities: 1. Design network topologies and configuration ... at Meta are hybrid software and network engineers who design , build, and operate our worldwide Data Center network....Understanding of different Optics and internals of a switch ASIC 20. Familiarity with the Linux based systems 21.… more
- Meta (Menlo Park, CA)
- …similar. 14. Work experience in one or more domains such as: AI ASIC development (Silicon design , bringup, characterization, validation), board level debug, ... **Summary:** Meta is seeking a Systems Engineer to join our Release to Production (RTP)...AI at datacenter scale.RTP Engineers work closely with HW/SW co- design teams, hardware designers, networking teams, system manufacturers, component… more
- Google (Mountain View, CA)
- …GPUs, and memory systems. + Experience in analog computing or energy efficient ASIC design . Preferred qualifications: + Master's degree or PhD in Electrical ... years of experience in hardware engineering, with a focus on chip design and architecture for machine learning applications. + Experience in the design and… more
- Meta (Menlo Park, CA)
- …3+ years of work experience in one or more domains such as: Network ASIC development (Silicon design or bringup or characterization), board development, network ... **Summary:** Meta is seeking a Systems Engineer to join our Release to Production (RTP)...of XFN partners they work closely with eg HW/SW co- design teams, hardware designers, networking teams, system manufacturers, component… more
- quadric.io, Inc (Burlingame, CA)
- …Ph.D. in Electrical or Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front-end design + Proficiency in SystemC, SystemVerilog, or Verilog + ... today that can only accelerate a portion of a machine learning graph, the Quadric GPNPU executes both NN...processor architecture. As a senior member of our chip design team, you will contribute to all stages of… more