• Design Verification

    Capgemini (San Francisco, CA)
    **Job Title: Design Verification Infrastructure Engineer ** **Job Location: Sunnyvale, CA (Remote work is OK)** **Job Description:** **Key ... .Minimum 5 years of strong experience in EDA/CAD SoC/IP design verification and infrastructure development...towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries… more
    Capgemini (10/05/24)
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  • Senior E/E & Semiconductor Engineer - Lead…

    Capgemini (San Francisco, CA)
    **Job role:** **Lead DV IP Verification Engineer ** **Job Location : San Francisco CA / Sunnyvale CA** **Job description:** Architect and Create verification ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Lead DV IP Verification Engineer_ **Location:** _CA-San… more
    Capgemini (09/04/24)
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  • Senior E/E & Semiconductor Engineer - ASIC…

    Capgemini (San Francisco, CA)
    **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level *Understanding constraints...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:**… more
    Capgemini (10/16/24)
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  • RTL Design Engineer

    Capgemini (San Francisco, CA)
    **RTL Design Engineer ** **Location: San Jose CA / Bay Area, but will consider remote.** **Job description:** . As an RTL Design Engineer you will be ... . Develop micro architectural document from requirements specifications. . Extensive RTL design utilizing Verilog / SystemVerilog . Perform basic linting and other… more
    Capgemini (10/12/24)
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  • Senior ASIC Physical Design Engineer

    Capgemini (San Francisco, CA)
    **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level + Understanding...block and chip level + Understanding constraints and fixing design /timing techniques + Block level implementation from netlist to… more
    Capgemini (10/16/24)
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  • Software Development Engineer - Device…

    Amazon (San Francisco, CA)
    …source control management, build processes, testing, and operations. - Experience developing design verification and electronic design automation tools - ... Description The AWS Center for Quantum Computing (CQC) is hiring a Software Development Engineer to develop our data applications and infrastructure with a focus… more
    Amazon (11/07/24)
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  • Senior E/E & Semiconductor Engineer

    Capgemini (San Francisco, CA)
    **Job Role:** **Physical Design (Synthesis) Engineer ** **Job Location : San Jose CA** **Job Description** + At least 7 years of experience in ASIC/SOC project ... _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Physical Design (Synthesis) Engineer_ **Location:** _CA-San… more
    Capgemini (11/12/24)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class ... SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture… more
    Meta (10/18/24)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video ... SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture… more
    Meta (10/09/24)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video ... SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture… more
    Meta (10/16/24)
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  • AMENDED: Principal Network Engineer

    City and County of San Francisco (San Francisco, CA)
    …with other teams and stakeholders within our organization. Essential Duties: + Design and implement the network infrastructure that supports the City's ... and County of San Francisco (CCSF). We deliver technology infrastructure and services to approximately 33,000 employees! With an...Public Safety Division is looking for a Principal Network Engineer to join the team that designs, builds, and… more
    City and County of San Francisco (11/01/24)
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  • Principal Manufacturing Test Engineer

    Microsoft Corporation (Mountain View, CA)
    Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for ... powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online.... We are looking for a Principal Manufacturing Test Engineer to join our team. Join us in this… more
    Microsoft Corporation (10/23/24)
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  • Journey Information Systems Engineer

    City and County of San Francisco (San Francisco, CA)
    …Application Deadline: Continuous How to Apply: Applications for Journey Information Systems Engineer - Systems Specialty are only accepted through an online process. ... these systems together as an enterprise networking backbone or platform. The 1042 Systems Engineer is the journey level position in the Engineer series. The… more
    City and County of San Francisco (11/06/24)
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  • Associate Engineer (Electrical), Transit…

    City and County of San Francisco (San Francisco, CA)
    …system engineering work on the Train Control Upgrade Project. During the project design phases, the Associate Engineer will support the project by reviewing ... such as CAD/AVL, asset management systems, SCADA systems, and databases. The Associate Engineer will contribute to the civil engineering design for any enabling… more
    City and County of San Francisco (10/19/24)
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  • Fleet Engineer - Associate Engineer

    City and County of San Francisco (San Francisco, CA)
    …Siemens LRV4 vehicles, historic streetcars, and non-revenue (hy-railer) vehicles. The Associate Engineer will support the successful design , fitment, and testing ... installation, construction support, technical expertise, and professional services. The Associate Engineer will participate in design activities with the… more
    City and County of San Francisco (10/19/24)
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  • Identity Governance Engineer and Architect…

    City and County of San Francisco (San Francisco, CA)
    …in the City and County of San Francisco (CCSF). We deliver technology infrastructure and services to approximately 33,000 employees! With an annual operating budget ... Reporting to the Director of IAM & Directory services, the IAM Engineer and will be responsible for the development, deployment, administration, and maintenance… more
    City and County of San Francisco (09/20/24)
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  • Senior Traction Power Engineer

    AECOM (Oakland, CA)
    …of system design . + Author test procedures and reports in support of design verification and validation during the project life cycle. + Support and ... QUALIFICATIONS:** + Degree in Electrical Engineering is preferred. + California Professional Engineer License is preferred. + Traction Power design experience… more
    AECOM (08/22/24)
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  • Hardware Engineer , Power

    Meta (Fremont, CA)
    …designs have been contributed to the Open Compute Project. **Required Skills:** Hardware Engineer , Power Responsibilities: 1. Define and design rack level power ... review. Create verification test case as needed. 4. Review circuit/PCB design , calculation and simulation. 5. Review and check test report and bug report.… more
    Meta (10/23/24)
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  • Senior Silicon Engineer PD CAD Signoff

    Microsoft Corporation (Mountain View, CA)
    The Azure Hardware Systems and Infrastructure team at Microsoft is spearheading the technology revolution, leading the creation and implementation of innovative ... cloud infrastructure solutions. Within our Silicon Engineering division, you will...and Computing. We are looking for a **Senior Silicon Engineer ** to join our team! If you are like… more
    Microsoft Corporation (11/12/24)
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  • Principal Signal Integrity Engineer - Data…

    TE Connectivity (San Francisco, CA)
    …Integrity Engineer for TE Connectivity you will focus on the electrical design , simulation, and verification -validation testing of high speed products in the ... Principal Signal Integrity Engineer - Data & Devices At TE, you will...initial analysis through prototype fabrication & evaluation, and production verification testing. You will tackle challenging design more
    TE Connectivity (10/02/24)
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