- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric… more
- Capgemini (San Francisco, CA)
- ** Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San… more
- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition ID:**… more
- Jacobs (San Francisco, CA)
- …up our communities today to improve tomorrow. We're looking for a mid-level Engineer to design geotechnical aspects of environmental remedial actions for complex ... pass your knowledge on to others. As a junior/mid-level Engineer , you'll be directed by Design Managers...field work for remediation projects, and an understanding of methodology and procedures * Experience working on active project… more
- General Motors (Mountain View, CA)
- …passionate engineer to join our team as a Staff ADAS Perception Systems Design Engineer . This is a great opportunity to work on ground breaking technologies! ... on all General Motors programs. As ADAS Perception Systems Design Engineer , a key enabler for General...+ Collaborate with other groups to shape the SW methodology and policy of GM autonomous driving SW +… more
- Microsoft Corporation (Mountain View, CA)
- …(AISiE) System on Chip(SoC) Design Verification team is seeking a **Principal Design Verification Engineer ** ** ** who can work with cross-discipline teams ... verification principles, testbenches, stimulus generation, System Verilog, Universal Verification Methodology (UVM), and coverage. + Experience with hardware design… more
- Google (Mountain View, CA)
- …dependencies and deliverables. + Work closely with system, software, design , Design for testing (DFT) and physical implementation stakeholders to make ... using SystemVerilog for ASIC designs. + Experience developing and maintaining design verification (DV) testbenches, test cases, and test environments. Preferred… more
- TE Connectivity (San Francisco, CA)
- Principal Signal Integrity Engineer - Data & Devices At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a ... sustainable and more connected world. **Job Overview** As a Principal Signal Integrity Engineer for TE Connectivity you will focus on the electrical design ,… more
- Stanford University (Stanford, CA)
- Research and Development Scientist and Engineer **School of Engineering, Stanford, California, United States** Research Post Date Nov 21, 2024 Requisition # 105283 ... focused on a fundamental understanding of organic electronic material design with skin-like properties (flexible, stretchable, self-healing, and biodegradable) and… more
- Abbott (Alameda, CA)
- …device products and digital services . Participate in system level design documentation and requirements specification with marketing, engineering, and other ... risk analysis, cybersecurity risk analysis, product testing (including V&V), and design control and regulatory documentation activities. . Participate in the… more
- JPMorgan Chase (San Francisco, CA)
- …enhance, build, and deliver top-notch technology products. As a Senior Lead Software Engineer at JPMorgan Chase within the technology department, you will play a ... debugs code written by others + Drives decisions that influence the product design , application functionality, and technical operations and processes + Serves as a… more
- Stanford University (Stanford, CA)
- CXR Senior Process and Integration Engineer **School of Engineering, Stanford, California, United States** Research Post Date Dec 11, 2024 Requisition # 105427 Note ... emerging and advanced technologies ( **X** ), by establishing design and process service routes ( **R** ). The...on research methods; educate and train users on research methodology and effective tools and techniques. + Supervise staff… more
- Western Digital (Fremont, CA)
- …data. **Job Description** We are seeking a talented and driven Process Engineer specializing in Chemical Mechanical Planarization (CMP). Your role will involve ... schedule, including weekends. ESSENTIAL DUTIES AND RESPONSIBILITIES: + CMP Process Engineer in a high-volume 24x7 wafer fabrication environment that is responsible… more
- Western Digital (Fremont, CA)
- …Description** We are seeking a talented and driven Process Development Engineer specializing in wafer wet process development (Chemical Mechanical Planarization ... process development engineers and technicians responsible for new process development, methodology setup, consumables, and advance tooling delivery to meet new… more
- Abbott (Alameda, CA)
- …task priorities. This individual will participate in system level design documentation and requirements specification. They will provides specialized functions ... such as algorithm development, user interface development, and data analysis methodology . The ideal candidate develops and follows specialized procedures in… more
- Abbott (Alameda, CA)
- …problems of defined scope. This individual participates in system level design documentation and requirements specification as well as provides specialized functions ... such as algorithm development, user interface development, and data analysis methodology . They will develop and follow specialized procedures in executing… more
- Gilead Sciences, Inc. (Foster City, CA)
- …technology realms associated with drug discovery. You will create functional design specifications, testing plans, and creative technology solutions in this role. ... to impact Research in a timely way. + Participates in architecture, security, and design reviews. + Defines (some) solutions that enhance a body of mature C#… more