- Broadcom (Irvine, CA)
- …design background is preferred & the candidate should have a strong scripting/ automation experience using Python / Perl Must have strong communication and ... documentation skills. Must be a self-starter and a strong team player. Candidates will primarily be responsible for working on automating design flows, supporting synthesis deliverables & STA. Apart from this, the candidate is also expected to handle minimal… more
- Palo Alto Networks (Santa Clara, CA)
- …goal is to create an environment where we all win with precision. **Your Career** As an ASIC Integration and CAD Engineer , you will ensure that the ASICs in ... - MSEE preferred + Minimum 5 years experience in ASIC integration and front end design +...continuous innovation that seizes the latest breakthroughs in security, automation , and analytics. By delivering a true platform and… more
- Meta (Sunnyvale, CA)
- …entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Silicon Lifecycle Engineering team, you will be part ... to deliver reliable and performant silicon to our applications. **Required Skills:** ASIC Engineer , Infra Silicon Enablement Responsibilities: 1. Work across all… more
- Meta (Sunnyvale, CA)
- …entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Silicon Lifecycle Engineering team, you will be part ... to deliver reliable and performant silicon to our applications. **Required Skills:** ASIC Engineer , Infra Silicon Responsibilities: 1. Work across all aspects… more
- Qualcomm (San Diego, CA)
- …Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration , or related work experience. OR ... Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration , or related work experience. OR PhD… more
- Meta (Sunnyvale, CA)
- **Summary:** As a ASIC Engineer on the Hardware Testing Infrastructure team at Meta, you will be a key player in defining the testing approach, creating the ... and infrastructure needed to excel in their roles. **Required Skills:** ASIC Engineer , Architecture Infrastructure Responsibilities: 1. Communicate your… more
- Qualcomm (Santa Clara, CA)
- …Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration , or related work experience. OR ... Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration , or related work experience. OR PhD… more
- Qualcomm (San Diego, CA)
- …Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration , or related work experience. OR ... Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration , or related work experience. OR PhD… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San Francisco_… more
- Qualcomm (Santa Clara, CA)
- …is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification lifecycle, ... Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration , or related work experience. OR… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....Specification in UPF for the multi-Vdd designs. 10. Developing Automation scripts and Methodology for all FE-tools including (Lint,… more
- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... timing budget generation, power planning, top-level PnR, CTS, block integration and ECO generation. + Expertise in timing closure...and Cadence EDA Tool Suite + Experience in Design Automation and UNIX system. + Experience in Tcl/Tk, PERL,… more
- Amazon (Cupertino, CA)
- …and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
- Cisco (San Jose, CA)
- …service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon ... breadth of growth opportunities that working in a smaller ASIC team can provide. You will work with exceptional...customer shipments Your Impact You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding… more
- Qualcomm (San Diego, CA)
- …Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration , or related work experience. OR ... Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration , or related work experience. OR PhD… more
- Broadcom (San Jose, CA)
- …have a Candidate Account, please Sign-In before you apply.** **Job Description:** **Design Automation Engineer ** This position is part of a team tasked with ... of use is critical. **Responsibilities:** Develop and support design automation flows for ASIC products and associated...checks + Physical verification runset support and development + Integration of flows and checks into design cockpits +… more
- Meta (Fremont, CA)
- **Summary:** The Systems Integration Engineer (SIE) is responsible for the successful Integration of new hardware platforms & new infrastructure technologies ... the role for you. This position is full-time. **Required Skills:** Systems Integration Engineer Responsibilities: 1. Lead new product introduction and associated… more
- Qualcomm (Santa Clara, CA)
- …Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration , or related work experience. OR ... Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration , or related work experience. OR PhD… more
- Google (Sunnyvale, CA)
- …description languages (SystemVerilog) and chip design flow, and building test automation tools and scripts. + Enthusiasm for unusual computer architectures. Be ... the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration . In this role, you will work on the test design,… more
- Qualcomm (San Diego, CA)
- …and collaboration across wide range of technical areas to include software, hardware, ASIC , integration , architecture, and emulation teams. + Paying attention to ... and collaboration across wide range of technical areas to include software, hardware, ASIC , integration , architecture, and emulation teams. + Paying attention to… more