- Apple (San Diego, CA)
- …to join us in delivering the next groundbreaking Apple products! Description As a Cellular ASIC Design Engineer , you'll develop and optimize design and ... across multiple focus areas including area efficiency, power optimization, and design technology co-optimization. You'll design innovative products at the… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. Required Skills: ASIC Engineer , Design Verification Responsibilities: Leverage Design ... Post-Silicon teams towards creating a first-pass silicon success. Furthermore, the ASIC Engineer , Design Verification will define and implement IP/SoC… more
- Apple (Cupertino, CA)
- …and AppleTV. Apple is looking for remarkable applicants for our Display Digital Design lead role to work with multi-functional teams and external vendors to define, ... efficiency in the Silicon community. We value your technical understanding of digital design principles. Here are the main responsibilities of this role: Assist in… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. Required Skills: ASIC Engineer , EDA Infrastructure Responsibilities: Front End implementation flow development ... Internal tools development and automation to help improve productivity across ASIC design cycles including but not limited to RTL generation tools, memory… more
- Apple (Los Angeles, CA)
- …ASIC power knowledge. Experience with Power tools, eg PTPX and Power Artist. Understand ASIC logic design . Knowledge of low power design and UPF. ... silicon development with a particular emphasis on highly energy-efficient / low-power design and new technologies that transform the user experience at the product… more
- Broadcom (San Jose, CA)
- …industry, including AI. Our ASIC products division is looking for a senior engineer to guide Customer teams designing challenging chips in areas such as AI, HPC, ... you apply. Job Description: Are you a versatile, senior engineer capable of leading external and internal cross-functional teams...and internal cross-functional teams in areas such as physical design , STA, DFT, and packaging? Have you taped out… more
- Micron Technology, Inc. (San Jose, CA)
- …inspiring the world to learn, communicate and advance faster than ever. Collaborate with design teams during the final stages of ASIC development. Validate and ... Engineering, Computer Engineering, or related field. Position requires: 1. CMOS ASIC fab process and test knowledge. 2. Analytical skills including ability… more
- Broadcom (San Jose, CA)
- …technologies in the industry encompassing 3D and 2.5D interconnects. We are seeking a design engineer with physical layout skills to develop our next generation ... interfaces. The job requires aspects of a successful layout engineer , an electrical background, a strong interest in 2.5D...This is an exciting opportunity to develop new ideas, design the next generation of leading edge ASIC… more
- Broadcom (San Jose, CA)
- …knowledge of RTL verification methodologies including System Verilog. Strong experience in ASIC design verification flows and DV methodologies Strong working ... have a Candidate Account, please Sign-In before you apply. Job Description: The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and… more
- Apple (San Diego, CA)
- …BS and a minimum of 10 years relevant industry experience. Knowledge of the ASIC design flow, synthesis, static timing analysis, RTL to Post Synthesis netlist. ... all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience...role, you will be at the center of the ASIC creation effort, interfacing with all disciplines, with a… more
- Apple (Sunnyvale, CA)
- …customers. Minimum Qualifications BS with 3+ years relevant experience. Familiarity with the ASIC design flow. Knowledge of digital design , SoC architecture, ... all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience...where you will be at the center of the ASIC debug efforts, collaborating with all fields, with a… more
- Broadcom (San Jose, CA)
- …and dynamic environment. Hands on experience with timing analysis and place and route tools for ASIC / SoC Design is a must. Should have worked on tape out of at ... Job Description: Candidate would be required to work on Design Implementation activities related to place and route and/...least 1-2 ASIC 's in 7nm or lower technologies Additional Job Description:… more
- Apple (Cupertino, CA)
- …digital design experience Preferred Qualifications Ability to use industry standard ASIC design tools Experience with modern design verification ... looking for a remarkable Mixed Signal Designer with analog design experience to work with multi-functional teams and external...specifically on all major blocks of an image sensor ASIC including ADCs, pixel array control, bias and reference… more
- Google (Sunnyvale, CA)
- SoC Physical Design Engineer corporate_fare Google place Sunnyvale, CA, USA Mid Experience driving progress, solving problems, and mentoring more junior team ... for complex SoC. Experience with multiple-cycles of SoC in ASIC design . Experience with scripting languages such...systems. As a System on a Chip (SoC) Physical Design Engineer , you will collaborate with Register-Transfer… more
- Apple (San Francisco, CA)
- …empower wireless products for hundreds of millions of customers. As a PHY Design Verification Engineer , you will be responsible for pre-silicon RTL verification ... of wireless silicon development with a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product… more
- Broadcom (Irvine, CA)
- …apply. Job Description: Job Description: This opening work on chip design which enables 100Gbps/200Gbps/400Gbps optical fiber communication prepare detailed ... design document HDL coding, equivalency checking, STA result review,...debugging experiences Good Knowledge in languages relevant to the ASIC /system development process including Verilog, Unix/Perl Scripting or Python,… more
- Silvus Technologies (Los Angeles, CA)
- …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Director of FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Silvus Technologies (Irvine, CA)
- …to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA/RTL Design Engineer_** who will report to the _Director of FPGA Engineering_ on the ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Apple (Cupertino, CA)
- …and highly motivated Proficient in scripting languages (TCL and Perl) Familiarity with ASIC design timing concepts Exposure in STA tools (Primetime) is a ... will work collaboratively with various SOC teams to execute design and integration tasks for the high quality IP...for the high quality IP deliverables. Description As an ASIC STA Engineer , you will have responsibilities… more
- Meta (Menlo Park, CA)
- …Integrity Engineer Responsibilities Lead platform-level signal integrity work, including design , validation, and test methodologies at the platform, board, and ... and intelligence. We are looking for a Signal Integrity Engineer to support the development of Meta's platforms and...ASIC levels with our silicon and manufacturing partners Align… more
