- Broadcom (San Jose, CA)
- …with TSMC 7nm-2nm, ie understanding of power consumptions, area, estimated design and layout efforts for digital blocks, technology limitations. ... Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design . + Deep knowledge about industry standards in Physical Design ,… more
- Actalent (El Segundo, CA)
- Job Title: FPGA Engineer Job Description We are seeking a skilled Digital ASIC /FPGA Design Engineer to support our Satellite Capabilities ... Code Coverage. Essential Skills + 3 or more years of experience in digital ASIC /FPGA design and verification. + Proficiency in Verilog or System Verilog.… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... of ASIC design experience or SOC integration design / flow experience + Fundamental digital design concepts and experience in ASIC design … more
- SpaceX (Irvine, CA)
- Sr. ASIC Design Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING)...performance and capabilities of the Starlink network. RESPONSIBILITIES: + Design digital ASICs and/or FPGAs for Starlink… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer ...and CMOS solid state physics + Knowledge of CMOS digital design principles, basic standard cells their ... with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
- Cisco (San Jose, CA)
- …Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification using ... design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware...is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation… more
- Western Digital (Roseville, CA)
- …based on simulations or FPGA testing. + Stay abreast of the latest ASIC design technologies and methodologies. **Qualifications** + Bachelor's degree in ... + **Minimum of 5-8 years of professional experience** in ASIC design , with a strong focus on...timing analysis (eg, Cadence, Synopsys). + Deep understanding of digital design principles, including FSMs, data path… more
- Qualcomm (Santa Clara, CA)
- …a closely related field is preferred + 5+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... closely related field + 5+ years of experience with ASIC design and verification tools, techniques, and...techniques, and methodology + 5+ years of experience with digital design concepts and RTL languages such… more
- Tarana Wireless (Milpitas, CA)
- …+ RTL design of digital circuits using Verilog + Frontend design development and integration of large ASIC designs including: Integration of Processors, ... This position will challenge you! The Senior ASIC Engineer will work on complex...IPs + Chip level integration and verification + RTL design and integration of large functional blocks in the… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... candidate should have a high aptitude for floor-planning the design of complex digital top level and/or...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design … more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is seeking an ASIC Design Engineer Intern to join our Infrastructure organization. Our servers and data centers are the foundation upon ... ASIC engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer Intern, Design Responsibilities: 1. Participate in… more
- Palo Alto Networks (Santa Clara, CA)
- …is to create an environment where we all win with precision. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ... mission: Being the cybersecurity partner of choice, protecting our digital way of life. Our vision is a world...- MSEE preferred + Minimum 5 years experience in ASIC design verification + Demonstrated success in… more
- Qualcomm (San Diego, CA)
- …Science, or a closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... closely related field + 3+ years of experience with ASIC design and verification tools, techniques, and...techniques, and methodology + 3+ years of experience with digital design concepts and RTL languages such… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... good understanding of Computer Architecture and Digital Systems design . + A deep understanding of ASIC design flow including RTL design ,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design...verification, logic synthesis and timing analysis. + Exposure to Digital systems and VLSI design , Computer Architecture,… more
- Qualcomm (Santa Clara, CA)
- …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related work experience. OR… more
- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition… more
- Capgemini (San Francisco, CA)
- **Job Title: ASIC Design Verification Infrastructure Engineer (Modern Python experience is must)** **Job Location: Sunnyvale, CA (Remote work is OK)** **Job ... by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _ASIC Design Verification Engineer (with modern Python programming)_ **Location:**… more
- SpaceX (Irvine, CA)
- …high-speed oscilloscopes, and other common lab equipment + Work closely with the FPGA/ ASIC design team and flight software team to add/improve testability and ... ASIC /FPGA Validation Engineer (Silicon Engineering) at...will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In… more
- Palo Alto Networks (Santa Clara, CA)
- …You will collaborate closely with the ASIC vendor and the PANW ASIC design team in floorplanning, closing timing, validating constraints, and optimizing ... we all win with precision. **Your Career** As an ASIC Integration and CAD Engineer , you will...RAMs, CAMs, custom IPs, and IO pads throughout the design hierarchy + Collaborate with external ASIC … more