• IC Layout Engineer

    SpaceX (Sunnyvale, CA)
    IC Layout Engineer ( Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... make this possible, with the ultimate goal of enabling human life on Mars. IC LAYOUT ENGINEER ( SILICON ENGINEERING) At SpaceX we're leveraging our… more
    SpaceX (12/25/24)
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  • IC Package Design Engineer

    SpaceX (Irvine, CA)
    IC Package Design Engineer ( Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... the ultimate goal of enabling human life on Mars. IC PACKAGE DESIGN ENGINEER ( SILICON ...BGA configuration and package structure + Responsible for package/SIP layout , optimization, design verification and tapeout + Interface and… more
    SpaceX (12/24/24)
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  • Staff Analog IC Design Engineer

    Skyworks (Irvine, CA)
    Staff Analog IC Design Engineer Apply now " Date:Dec 29, 2024 Location: Irvine, CA, US Company: Skyworks If you are looking for a challenging and exciting career ... cell phone applications. You'll be paired with an experienced engineer to support you as an integral part of...in implementing on-chip ESD protection strategies for HBM/MM/CDM on IC + Strong understanding of silicon fabrication… more
    Skyworks (11/17/24)
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  • Senior Staff IC Design Engineer

    Power Integrations (San Jose, CA)
    As a Senior Staff IC Design Engineer , you will be responsible for switching power supply development of integrated circuits using CMOS/Bipolar analog/digital ... switching power supply: + Simulation with Cadence tools. + Layout supervision and verification. + Preparation of test plan....+ Product characterization. + Bench evaluation both at the silicon level and application level. + Behavioral modeling of… more
    Power Integrations (12/06/24)
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  • Staff Analog IC Design Engineer

    Power Integrations (San Jose, CA)
    …circuitry. Technical responsibilities include: analog and digital circuit design, simulation, layout supervision and verification, preparation of test plan for the ... bench to test correlation, bench evaluation both at the silicon level and at the applications level, and documentation....and requires having good verbal and written communications skills. Engineer must be interested in learning, be a creative… more
    Power Integrations (11/07/24)
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  • Analog IC Design Engineer

    Insight Global (Irvine, CA)
    …and etc - Experienced in implementing on-chip ESD protection strategies for HBM/MM/CDM on IC - Strong understanding of silicon fabrication and how it affects the ... PhD and 3 years. MSEE preferred - Demonstrated Analog IC design experience using SOI CMOS - Proficient with...techniques to mitigate analog signal noise coupling and optimum layout for performance, and die size trade off -… more
    Insight Global (01/11/25)
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  • Senior Analog Layout Engineer

    Capgemini (San Francisco, CA)
    **Job description:** **Senior Analog Layout Engineer ** will be responsible for layout of high-performance analog cores such as analog-to-digital converters, ... digital-to-analog converters, PLL, transceivers, etc. Responsibilities include leading IC layout of cutting-edge high-performance, high-speed CMOS integrated… more
    Capgemini (01/17/25)
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  • SiliconOne Mechanical Packaging Engineer

    Cisco (San Jose, CA)
    …and SMT attach strategies and involved in multiple aspects of substrate planning and layout to make new silicon products successful. You will develop advanced ... Who We Are Cisco Silicon One is a business organization building and...of teammates Who You Are You are a mechanical engineer with substrate expertise working on cutting-edge technologies and… more
    Cisco (11/13/24)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and multifaceted ... intelligence. What you'll be doing: + Lead and implement IC physical layout for mixed-signal functions like...concepts in submicron CMOS technologies. + Experience with analog layout for silicon chips in mass production.… more
    NVIDIA (01/16/25)
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  • SMTS, Analog Design Engineer - Automatic…

    Integense (San Diego, CA)
    …to achieve industry-leading performance. * Utilize popular simulation tools, guide layout floor-planning, and conduct parasitic extraction and pre-/post- silicon ... a holistic, system-level approach, blending innovative circuit design, proprietary silicon process technology, and materials engineering to deliver optimal product… more
    Integense (12/25/24)
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  • Staff Failure Analysis Engineer

    Power Integrations (San Jose, CA)
    IC ATE test data log is required. Ability to interpret system level schematics, the IC level schematics, and IC layout of CMOS and bipolar devices is ... Job Description: The Staff Silicon Level Failure Analysis Engineer will...+ Performing fault isolation and defect analysis/characterization on power IC 's to identify root causes of product failures in… more
    Power Integrations (01/21/25)
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  • Senior Analog Design Engineer

    Microsoft Corporation (Mountain View, CA)
    Microsoft Silicon , Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering ... mission. We are looking for a **Senior Analog Design Engineer ** to join the team. Microsoft's mission is to...and simulation setup to analyze and perform pre and post- layout simulations of the analog basic building blocks across… more
    Microsoft Corporation (01/18/25)
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  • ASIC Package Signal/Power Integrity…

    Cisco (San Jose, CA)
    …or if a sufficient number of applications are received. Meet the Team Cisco Silicon One is a business organization with a long track record of building complex ... and high-performance Silicon ASICs. Our silicon devices drive the...ASIC team with experts in all aspects of advanced IC package design and heterogeneous system integration. Our substrates… more
    Cisco (01/07/25)
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  • Kilby Labs GaN Device Engineer Intern

    Texas Instruments (Santa Clara, CA)
    …(customer decision-makers, application engineers, marketing, management, sales, IC design engineers, technology development) to negotiate specifications, ... technical definitions for new products. They then collaborate with the full IC development team (design, applications, test, product engineers) to deliver products… more
    Texas Instruments (01/06/25)
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  • RF SiP Power Amplifier Design Engineer

    Skyworks (San Jose, CA)
    …in Package solutions. + Take hands-on design responsibility, including overseeing detailed IC layout , lab evaluation, and back-fitting of designs. + Present ... RF SiP Power Amplifier Design Engineer Apply now " Date:Jan 1, 2025 Location:...operation, matching, bias, and architectural considerations. + Experience with IC tape-outs in Silicon , GaAs HBT, GaN,… more
    Skyworks (12/10/24)
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  • Sr. Electrical Engineer

    Skyworks (Irvine, CA)
    …and etc + Experienced in implementing on-chip ESD protection strategies for HBM/MM/CDM on IC + Strong understanding of silicon fabrication and how it affects the ... Sr. Electrical Engineer Apply now " Date:Jan 5, 2025 Location:...years, or PhD and 5+ years + Demonstrated Analog IC design experience using SOI CMOS + Proficient with… more
    Skyworks (11/09/24)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …this diverse team and help move the needle! We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. This ... circuit designs at data rates of 25Gbps and higher from concept through silicon characterization. + Help by defining circuit requirements and complete design from… more
    NVIDIA (01/15/25)
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  • High-Speed Electrical Engineer

    Applied Materials (Santa Clara, CA)
    …characterization of high-speed communication transceiver chip sets. + Projects also may include IC layout and silicon characterization, prepare test methods ... The High Speed Electrical Engineer is responsible for design and modeling of...IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization + Experience… more
    Applied Materials (01/21/25)
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  • RFIC Design Engineer

    Skyworks (Newbury Park, CA)
    RFIC Design Engineer Apply now " Date:Jan 17, 2025 Location: Newbury Park, CA, US Company: Skyworks If you are looking for a challenging and exciting career in the ... expertise and utilize a broad range of technologies (SOI, silicon CMOS, GaAs, IPD, TC-SAW and pHEMT) to create...for mobile and 5G applications. As a Sr. Electrical Engineer , you will be responsible for the design and… more
    Skyworks (01/04/25)
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  • Sr. Staff Design Engineer (Low Power)

    Qualcomm (Santa Clara, CA)
    …from specification, RTL implementation, verification, synthesis, timing closure, emulation and post silicon bring up. The candidate is also responsible for the ... silicon power measurements, Si debug and power correlation. The...power use, and verification or similarly for custom circuit design/ layout flow. * Utilizes tools/applications (eg, RTL to GDS… more
    Qualcomm (01/09/25)
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