• Intern - Layout AI

    Micron Technology, Inc. (San Jose, CA)
    …technology development, design, and system-level optimization. **Position Overview** As a Custom Layout Reasoning and Automation Intern at Micron, you ... testing on co-pilot tools and design workflows + Verify layout automation results and identify issues or...students with strong course and project background in Generative AI and Agentic Flows. + Strong programming experience (Python… more
    Micron Technology, Inc. (11/26/25)
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  • Intern - Design Engineer

    Micron Technology, Inc. (San Jose, CA)
    …subsystems for best-in-class NAND products. We focus on innovation and automation to optimize design cycles and deliver high-performance memory solutions. **Position ... Overview** As a Design Engineer Intern , you will contribute to the design and validation...Computer Science to develop tools that automate schematic generation, layout planning, and waveform synthesis using advanced techniques such… more
    Micron Technology, Inc. (11/21/25)
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  • Hardware Engineer PhD ( Intern ) - United…

    Cisco (San Jose, CA)
    …positions available in: ASIC Design and Verification System/Board Design Circuit Board Layout Hardware Automation , Validation and Test Signal Integrity Power ... areas such as ASIC Design and Verification, System/Board Design, Circuit Board Layout , Hardware Automation , Validation and Test, Signal Integrity, and Power… more
    Cisco (12/06/25)
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  • PhD Intern - Hardware Design Methodologies

    Pacific Northwest National Laboratory (Sacramento, CA)
    …scalable algorithms and methodologies for hardware design and electronic design automation + Develop AI -driven design-space exploration techniques and ... will bring knowledge of scientific distributed computing and/or electronic design automation (EDA), though these areas are not strict requirements. This internship… more
    Pacific Northwest National Laboratory (12/09/25)
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