- Apple (San Francisco, CA)
- …world-class silicon to empower wireless products for hundreds of millions of customers. As a PHY Design Verification Engineer , you will be responsible ... , Systems/ PHY /MAC architecture and design , VLSI/RTL design and integration, Design Verification , Emulation, Test and Validation, and FW/SW… more
- Apple (San Diego, CA)
- …and design , Systems/ PHY /MAC architecture and design , VLSI/RTL design and integration, Emulation, Design Verification , Test and Validation, and ... FW/SW engineering. Description As a SOC Verification Engineer , you will be responsible for...constrained random testing, and debugging. Solid understanding of reusable verification framework. Knowledge of digital logic design ,… more
- Apple (San Diego, CA)
- …and design , Systems/ PHY /MAC architecture and design , VLSI/RTL design and integration, Emulation, Design Verification , Test and Validation, and ... of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …make an impact on the world of technology. We are seeking a highly skilled Design Engineer to join our Palladium Solutions Development team, to drive the ... development of full-system design verification environments. This role focuses on...Mixed Signal Designs and components (PHYs). Integration includes the PHY , Controller / Mac and the Accelerable Verification… more
- Apple (Los Angeles, CA)
- …and design , Systems/ PHY /MAC architecture and design , VLSI/RTL design and integration, Emulation, Design Verification , Test and Validation, and ... phase-locked loops, crystal oscillators, wideband LDOs and bandgap references. As an RFIC design engineer , you will be at the center of this wireless SoC … more
- Apple (San Diego, CA)
- …and design , Systems/ PHY /MAC architecture and design , VLSI/RTL design and integration, Emulation, Design Verification , Test and Validation, and ... for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the… more
- Apple (Sunnyvale, CA)
- …and design , Systems/ PHY /MAC architecture and design , VLSI/RTL design and integration, Emulation, Design Verification , Test and Validation, and ... all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience...power, performance, and area goals. You will own the design for the debug and trace hub. You will… more
- Apple (San Francisco, CA)
- …In-depth knowledge of wireless communication systems with hands-on experience in 4G/5G PHY design , channel models, pre-silicon verification and critical ... ready to join a team redefining hardware technology? We are searching for a dedicated engineer to join our exciting team of innovators. In this role, you will be a… more
- Apple (San Francisco, CA)
- …and design , Systems/ PHY /MAC architecture and design , VLSI/RTL design and integration, Emulation, Design Verification , Test and Validation, and ... for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the… more
- Apple (San Diego, CA)
- …and design , Systems/ PHY /MAC architecture and design , VLSI/RTL design and integration, Emulation, Design Verification , Test and Validation, and ... development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience...you will be at the center of a silicon design group with a critical impact on getting functional… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP ... Join the High-Performance Culture at Cadence.As a Technical Presales Engineer , you will support the technical presales of DDR...providing solutions using our DDR IP portfolio. Our memory PHY and controller IPs are used in data centers,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …make an impact on the world of technology. We are seeking a highly skilled Design Engineer to join our Palladium Solutions Development team, to drive the ... development of full-system design verification environments. This role focuses on...Mixed Signal Designs and components (PHYs). Integration includes the PHY , Controller / Mac and the Accelerable Verification… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Join the High-Performance Culture at Cadence. As a Lead Technical Presales Engineer , you will use your knowledge of different memory interface standards to ... providing solutions using our DDR IP portfolio. Our memory PHY and controller IPs are used in data centers,...and designers . Write application notes, user guides, articles, design ideas, new product proposals, and evaluation kit manuscripts… more
- NVIDIA (Santa Clara, CA)
- …the choice to join us today. The mixed-signal high-speed I/O group delivers innovative PHY designs that power the most powerful AI systems in the world today. Our ... portfolio includes PHY IPs and Chips for both copper and fiber...be translated into RTL and firmware designs. For backend design , you will define, build synthesis constraints and drive… more
- Teledyne (Milpitas, CA)
- …and networking. **Role Overview** We are looking for a top-notch Staff Logic Design engineer who has the right composition of knowledge, experience, team ... measurement products. Join our high-speed Protocol Team as a **Staff** **Logic Design Engineer ** , where you'll architect and implement high-performance digital… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …the world of technology. About Us Cadence is a pivotal leader in electronic design , building upon more than 30 years of computational software expertise. We apply ... our Intelligent System Design strategy to deliver software, hardware, and IP that...team and help lead the proliferation of best-in-class Memory PHY IP products across a wide range of customers.… more
- Broadcom (San Jose, CA)
- …Description:** Broadcom's CSG division is seeking candidates for a Staff DFT engineer position. The successful candidate will be responsible for developing and ... implementing DFx ( Design for Test/debug & manufacturability) solutions for Digital, mixed...for test. **Responsibilities** + Own IP DFT architecture, implementation, verification , signoff STA constraints for DFT + Optimize DFT… more
- Broadcom (San Jose, CA)
- …and PHY /IO's + Scan flow development, ATPG pattern generation, verification and coverage analysis + Experience working with Mentor/Siemens DFT Tessent tool ... for leading most complex and cutting edge network switching ASIC DFx ( Design for Test/debug & manufacturability) from DFT architecture, to implementation, … more
- Tarana Wireless (Milpitas, CA)
- …complex systems, and a strong working knowledge of wireless technology from the PHY /MAC layer perspective. What You'll Do: + Design and develop system ... previously thought impossible. In this role, Staff Systems Test Engineer will be part of a team responsible for...10+ years of experience in wireless device and system verification . + Working experience with OFDM wireless system development… more
- Amazon (Cupertino, CA)
- …professional. Basic Qualifications - Experience in developing functional specifications, design verification plans and functional test procedures - ... Description AWS Infrastructure Services owns the design , planning, delivery, and operation of all AWS...Recent 5+ years experience with Ethernet switching fabrics, Ethernet PHY and SerDes interfaces, embedded CPU subsytems, DDR2/DDR3/DDR4 memory… more
