- NVIDIA (Santa Clara, CA)
- …develops methods to make NVIDIA's products more energy efficient. We deliver power and energy models that work with performance simulators, RTL simulation, ... emulation, and silicon platforms. As a member of the Architecture Energy Modeling Team, you will collaborate with Architects, ASIC Design Engineers, Low Power … more
- NVIDIA (Santa Clara, CA)
- As a member of the Architecture Energy Modeling Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, ... and Physical Design teams to study and implement energy modeling techniques for NVIDIA's next generation GPUs, CPUs and...AI workloads and make improvements in architecture, design, and power management. Today, NVIDIA is tapping into the unlimited… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... to optimize performance, yield, and reliability through increasingly comprehensive modeling , informative analysis, and automation. This work will influence the… more
- Qualcomm (San Diego, CA)
- …to decision makers. You will participate to develop a key architecture modeling platform and support its continuous improvement. **Responsibilities** In your role, ... define the requirements for next-generation SoCs + Support on exploratory methodology projects, involving machine learning, data science, etc. + Expand, maintain… more
- Microsoft Corporation (Sunnyvale, CA)
- …with a goal of improved power efficiency across the stack. + Develop power and performance modeling methodology by creating and owning System on ... the Cloud infrastructure. We are looking for a **Senior Power and Performance Engineer ** to join the...SOC performance results to senior management. + Maintain the power modeling infrastructure, used for power… more
- Qualcomm (San Diego, CA)
- …experience. - Strong background in system and hardware design. - Strong background in power methodology , power architecture, clock & reset arch, power ... smarter, connected future for all. As a Qualcomm GPU Engineer , you may architect, design, implement, verify, and/or optimize...- Experience with: power target definition. - Power and/or performance optimization through simulation & modeling… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Signal & Power Integrity Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... creative Signal Integrity solutions to complex system design problems. + Modeling and Optimization of vias, connectors, sockets, breakouts and various system… more
- Qualcomm (San Diego, CA)
- …fast-paced SoC team responsible for development of next Generation, high performance, low power Memory Subsystem RTL Design, flows and methodology for high ... and validate against post-silicon measurements. + Propose, enhance and maintain power analysis, optimization and modeling methodologies and flows.… more
- Public Consulting Group (Sacramento, CA)
- …SharePoint, Teams, Power Apps and Power BI + Knowledge of Power BI data querying and modeling capabilities, such as creation of calculated columns, ... Studies Responsibilities include building solutions for internal and external projects using Power BI and Power Platform. Also responsible for the development… more
- SpaceX (Hawthorne, CA)
- Sr. Reliability Engineer (Starshield) at SpaceX Hawthorne, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... the ultimate goal of enabling human life on Mars. SR. RELIABILITY ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to… more
- Qualcomm (Santa Clara, CA)
- …individuals for our cutting-edge technology work! As a Lead CPU performance projection engineer you will be responsible modeling and projecting the CPU ... * Correlate performance projections vs silicon measurements and refine the projection methodology accordingly * Organize work and document status, results in Jiras *… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... timing closure strategy, creating timing constraints, driving timing and power convergence, as well as ECO implementation + Apply...experience to improve timing convergence flows working with the methodology teams. What we need to see: + BS… more
- GovCIO (Sacramento, CA)
- **Overview** GovCIO is currently hiring for a Sr. Cloud Azure Data Engineer . This position is a fully remote position within the United States. **Responsibilities** ... Master data management solutions + Specification of Data Quality Management methodology and supporting technology tools + Working within a project management/agile… more
- The Boeing Company (Huntington Beach, CA)
- …these projects. We are seeking a **Digital Integrated Circuit Design Engineer (Mid-Level, Senior or Lead)** with experience developing complex, high-performance ... Beach, California.** **Position Responsibilities:** + Microarchitecture design and behavioral modeling (eg Matlab, Arm Socrates) + RTL design (Verilog, VHDL),… more
- onsemi (San Jose, CA)
- …an experienced MTS **ASIC Verification** to join our dynamic team. As a verification engineer , you will play a crucial role in ensuring the quality and reliability ... this role is for you. Participate in architecture definition and modeling . Contribute to micro-architecture specification and reviews. Review industry standard specs… more
- NVIDIA (Santa Clara, CA)
- …Opportunity: Manager, Speed and Reliability System Architecture. Our Speed, Reliability, and Power Modeling team, nestled within SSG, is dedicated to ... groundbreaking system architecture features that improve speed, ensure reliability, and optimize power modeling for all NVIDIA silicon projects. We are integral… more
- Google (Mountain View, CA)
- …strategies and plans. + Experience creating or using verification components and environments in methodology (UVM, VMM, OVM). + Experience in RTL, low power (eg, ... Unified Power Format or Common Power Format), gate level (GLS) and formal verification techniques....SystemVerilog models of analog blocks using advanced techniques (real-number modeling (RNM), Verilog-AMS, etc.). + Proficiency in one or… more
- Qualcomm (Santa Clara, CA)
- …**General Summary:** Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP , ... pre- and post-silicon verification to verify correctness and ensure performance and power goals are met. The responsibilities of this role include: + Owning… more