- Google (Sunnyvale, CA)
- …delivering unparalleled performance, efficiency, and integration. As a Tensor Processing Unit (TPU) Compute RTL Design Engineer you will be part of a team ... Work with Design Validation (DV) teams to create testplans to verify and debug design RTL . + Work with physical design teams to ensure design meets… more
- Capgemini (Santa Clara, CA)
- **Location: San Clara, California.** **Job description:** The RTL Engineer performs detailed block design from system requirements and evolving ... and execute low power design (UPF/CPF). * Design top level RTL , integration of blocks,...towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries… more
- Qualcomm (Santa Clara, CA)
- … development targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer , you will work with chip architects to ... specification. + RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals. + Functional… more
- NVIDIA (Santa Clara, CA)
- … design process + Develop and enhance C++ based software tools to improve RTL design productivity and quality + Research and develop software solutions to ... rtl , and gate level designs. As a software engineer , you will craft highly efficient software to automate...stand out from the crowd: + Good architecture and RTL design knowledge + Strong expertise in… more
- Amazon (San Diego, CA)
- …underserved communities around the world. Come work at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design team. This team is using ... in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level...models in MATLAB. - Involve in control plane logic design and interfaces to bus fabrics. - Explore and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …but is not limited to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + Strong background in ... and developing flows at all phases of the digital design and functional verification. It is further expected that...well as a thorough understanding of the end-to-end digital design flow in order to accurately and efficiently collaborate… more
- Qualcomm (Santa Clara, CA)
- …using a scripting language such as Perl or Python. **Roles and Responsibilities** As an RTL engineer you will own or participate in the following: * Performance ... specification. * RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals. * Functional… more
- NVIDIA (Santa Clara, CA)
- …(or equivalent experience). BS with 6+ years, or MS with 4+ years of experience in RTL analysis, RTL design , and verification. + Deep understanding of static ... world. We are looking for a motivated CAD Methodology Engineer to join our dynamic and growing team. If...Be part of a diverse team creating NVIDIA's chip design methodology! We're responsible for the RTL … more
- Amazon (Cupertino, CA)
- …for in the United States. In Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but across the industry. The work we ... while also being deeply important to our customers. We design and build every component of our hardware and...the future with us! Responsibilities: * Participate in logic design activities as part of Amazon's machine learning custom… more
- US Tech Solutions (Goleta, CA)
- **Job Description:** + As an FPGA design engineer , you will take ownership of project components and develop scalable RTL that meets timing requirements. + ... 8+ years of experience in FPGA design and development. + Experience with RTL design using Verilog or system Verilog. + Experience with JESD DAC and ADC bring… more
- Broadcom (San Jose, CA)
- …applications. We are seeking a staff **Digital Front-End Designer** with deep expertise in RTL design , synthesis, and design optimization to drive the ... micro-architecture, and PPA trade-offs to optimize performance, power, and area. ** RTL Design and Micro-Architecture:** + Develop high-quality RTL designs… more
- Google (Mountain View, CA)
- FPGA Design Engineer , Taara Hardware Engineering Mountain View, CA About the team: Project Taarafocuses on delivering high-throughput and long-range connectivity ... feedback-based precision line-of-sight tracking systems. + Develop testbenches for RTL modules, perform simulation, and verify design ...for RTL modules, perform simulation, and verify design requirements are met. + Integrate third party IP… more
- Amazon (Cupertino, CA)
- …Basic Qualifications - BS in Electrical Engineering or related technical field - 5+ years in RTL design for SOC - 5+ years in VLSI engineering - 5+ years with ... will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications. - Analyze design , microarchitecture… more
- Google (Mountain View, CA)
- …and Systems + High performance machine learning accelerator architecture, micro-architecture and RTL design . + Selection and integration of in-house and third ... can flourish. We are seeking a highly motivated Hardware Engineer to join our team and contribute to development...equivalent practical experience. + 7+ years of experience in RTL design in Verilog/System Verilog. + 5+… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... SystemVerilog. + Experience with logic synthesis techniques to improve RTL code, performance and power as well as low-power... code, performance and power as well as low-power design techniques. + Experience with ARM-based SoCs, interconnects and… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position ... interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis and timing analysis.… more
- SpaceX (Sunnyvale, CA)
- Sr. DDR IP Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... of enabling human life on Mars. SR. DDR IP DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...Controller/PHY IP core development and integration + Responsible for RTL design , synthesis, timing constraints, power estimation,… more
- Qualcomm (San Diego, CA)
- …and Boxborough and across all levels. **What you will be doing** : Micro-architect and design RTL for blocks and modules of Adreno GPU architecture across shader ... and requirements Develop micro architecture and specification of the new generation design Develop RTL for the corresponding micro architecture Provide essential… more
- Google (Sunnyvale, CA)
- …efficiency, and integration. In this role, you will join a team working on SoC-level RTL design for our data center accelerators. In this role you will own ... top-level RTL , architecture, design and implementation of global communication busses, and integration of complex ASIC designs. This is a cross-functional and… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... on computer architecture. + 10 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.… more