- SanDisk (Milpitas, CA)
- …and specifications. + Coordinate effectively with SoC Design , SoC Design Verification, ASIC Validation, DFT, Physical Design , Hardware, Mixed ... + Maintain and enforce the highest industry standards and best practices in ASIC design development. Provide mentorship and guidance to team members, fostering… more
- SanDisk (Irvine, CA)
- …teams in identifying and resolving issues. + Debugging, optimizing, and validating the Firmware on SoC platforms, as well as bringing up of FPGA and ASIC . + ... Firmware by supporting its development at different stages, including design , threat analysis, implementation, validation, vulnerability testing, certification, and… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN METHODOLOGY/CAD ENGINEER (SILICON ENGINEERING) At SpaceX… more
- SpaceX (Sunnyvale, CA)
- …in scan insertion or DFT setup PREFERRED SKILLS AND EXPERIENCE: + Understanding of ASIC design flow, methodologies, physical design , and verification ... ASIC / SOC DFT Engineer (Silicon Engineering) Sunnyvale,...design readiness for scan insertion through RTL and physical design Scan Design Rule… more
- SpaceX (Sunnyvale, CA)
- …extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/Senior: $170,000.00 - $230,000.00/per year Your actual level ... Sr. SOC / ASIC DFT Engineer (Silicon Engineering) Sunnyvale,...will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering and ASIC implementation).… more
- SpaceX (Sunnyvale, CA)
- Sr. ASIC / SOC Verification Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In this… more
- Meta (Sunnyvale, CA)
- …Join Meta's Infrastructure organization to leverage your expertise in ASIC Physical Design , driving high-performance, AI/ML SoC and IP development ... and innovation of our data center applications. **Required Skills:** ASIC Engineer Physical Design Responsibilities:...design of an end-to-end IP or integration of ASIC / SoC design and point out… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Physical Design Engineers...design of an end-to-end IP or integration of ASIC / SoC design and point out ... ) and IP for data center applications. **Required Skills:** ASIC Engineer, Physical Design Responsibilities:...design and timing closure 12. Experience with large SOC designs (>20M gates) with frequencies over 1GHZ 13.… more
- Amazon (Sunnyvale, CA)
- …ASIC / SOC leads) to create project execution plans for ASIC / SOC development considering all criteria to design products the meet the power/performance ... a Sr. Technical Program Manager with experience in complex ASIC / SOC development of managing various phases of...end design , pre-silicon verification, FPGA prototyping, Emulation, Physical design , BROM, FW, substrate and package… more
- SpaceX (Sunnyvale, CA)
- Sr. ASIC Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...problems including clock domain crossings and power optimization + ASIC / SoC system integration experience + Experience with… more
- NVIDIA (Santa Clara, CA)
- …modules. What you'll be doing: + Be an integral part of the System ASIC Design team to help with the Micro-architecture definition for system-level functions, ... of several modules. + Integrate modules into the overall SOC design and work closely with other...functions like Reset or Chip Boot + Solid frontend ASIC design skills, including RTL design… more
- Cisco (San Francisco, CA)
- …Exposure to scripting languages (eg, Python, Perl, TCL) for automation. + Familiarity with ASIC / SoC design flow including synthesis, place & route, and ... and verification, digital signal processing, memory and custom library development, physical design , DFT, signal integrity, and advanced packaging. Work with… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory Subsystem Team! As a Senior ASIC Design engineer at NVIDIA, you'll join a group of ... Subsystem Design team, you will collaborate with architects/ design verification/formal verification/ physical design team...a plus. + Experience with all stages in the ASIC design flow including emulation, prototyping, DFT,… more
- NVIDIA (Santa Clara, CA)
- …closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and develop ... will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage...DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,… more
- NVIDIA (Santa Clara, CA)
- …closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and develop ... will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage...DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,… more
- Broadcom (Irvine, CA)
- …team to collaborate on test plan, coverage plan, and coverage closure + Work with physical design team on design constraints and timing closure + Work ... solutions. This key role requires a deep, end-to-end understanding of the entire ASIC architecture, design , and verification flow-from initial concept and RTL… more
- Amazon (San Diego, CA)
- …and post-silicon validation as part of Amazon custom silicon solutions. * Work with physical design teams to achieve performance and area requirements. * Develop ... company DNA. As part of a project team you will work alongside Senior ASIC Engineers; supporting the design , debug, validation and optimization of the products.… more
- NVIDIA (Santa Clara, CA)
- …work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design , Physical design , CAD, Package Design , ... NVIDIA is looking for a Senior SOC Design Engineer to join our...actionable improvements + Ensure high-quality RTL delivery to the physical design team with thorough design… more
- Google (Sunnyvale, CA)
- SoC Physical Design Engineer _corporate_fare_ Google...for complex SoC . + Experience with multiple-cycles of SoC in ASIC design . + Experience ... its integration within AI/ML-driven systems. As a System on a Chip ( SoC ) Physical Design Engineer, you will collaborate with Register-Transfer Level (RTL),… more
