• Sr Principal IC

    Cadence Design Systems, Inc. (San Jose, CA)
    …and enthusiastic about how to help customers solve their toughest verification problems using Cadence technology. Join our elite application engineering team ... for verification to work closely with the best AEs, PEs...year! As an integral member of the North America Verification Field Applications Engineering (AE) Team, you will work… more
    Cadence Design Systems, Inc. (12/03/24)
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  • Principal RF/Microwave IC Design…

    Northrop Grumman (Mcclellan, CA)
    …for emerging simulation needs. This position may be filled as a Principal RF/Microwave IC Design Engineer OR Sr . Principal RF/Microwave IC Design ... security clearance (US Citizenship is a requirement for this). **Basic Qualifications for Sr . Principal RF/Microwave IC Design Engineer** + Bachelor of… more
    Northrop Grumman (01/11/25)
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  • Principal IC Design Engineer…

    Northrop Grumman (Mcclellan, CA)
    …test plans based on circuit requirements. **This position can be filled at the Principal IC Design Engineer OR the Sr . Principal IC Design Engineer ... a Top Secret/Sensitive Compartmented Information (TS/SCI) security clearance. **Basic Qualifications for Sr . Principal IC Design Engineer** + Bachelor of… more
    Northrop Grumman (01/11/25)
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  • Sr . Principal RF SOI IC

    Skyworks (Irvine, CA)
    Sr . Principal RF SOI IC Design Engineer Apply now " Date:Jan 8, 2025 Location: Irvine, CA, US Company: Skyworks If you are looking for a challenging and ... We are seeking engineering talent with expertise in developing RF/Microwave RF SOI IC design in the concept, design, integration, and delivery of complex multi-chip,… more
    Skyworks (12/18/24)
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  • Principal Digital IC Design Engineer

    RTX Corporation (Sacramento, CA)
    …safer, more secure world. Job Summary: An exciting opportunity exists at Raytheon for a Principal Digital IC Design Engineer to join our strong team. In this ... activities with cross-functional teams including chip architecture, specification, design, verification , validation, fabrication, packaging, debugging, test development, failure analysis,… more
    RTX Corporation (11/21/24)
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  • Principal / Sr . Principal RF…

    Northrop Grumman (Mcclellan, CA)
    …processing/memory subsystems, and large-scale high-performance computing systems. MDA is seeking a ** Principal / Senior Principal RF MMIC Design Engineer** ... with Polygraph. US Citizenship is a requirement for this. ** Sr . Principal RF MMIC Design Engineer Basic...with Polygraph. US Citizenship is a requirement for this. ** Principal / Senior Principal RF… more
    Northrop Grumman (01/11/25)
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  • Principal or Sr . Principal

    Northrop Grumman (Mcclellan, CA)
    …circuit designs to meet assembly-level requirements This position may be filled as a Principal RF Modeling and Simulation Engineer OR Sr . Principal RF ... security clearance (US Citizenship is a requirement for this). **Basic Qualifications for Sr . Principal RF Modeling and Simulation Engineer** + Bachelor of… more
    Northrop Grumman (01/11/25)
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  • Sr . Staff Design Engineer (Low Power)

    Qualcomm (Santa Clara, CA)
    …Science, Engineering, or related field and 6+ years of ASIC design, verification , validation, integration, or related work experience. OR Master's degree in Science, ... Engineering, or related field and 5+ years of ASIC design, verification , validation, integration, or related work experience. OR PhD in Science, Engineering, or… more
    Qualcomm (01/09/25)
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  • Principal Layout Engineer

    ManpowerGroup (San Jose, CA)
    Sr . Layout Engineer **SUMMARY:** A fast-growing Power Management division focusing on Power Loss Protection, PMICs, Motor Control, and Battery Management solutions ... Mobile, Consumer, IoT, and Industrial applications is seeking an experienced Principal Layout Engineer. **RESPONSIBILITIES:** + Layout of Power and Analog integrated… more
    ManpowerGroup (01/02/25)
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  • Principal Physical Design Engineer (Icb5)

    Broadcom (San Jose, CA)
    …features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer, the ideal candidate will be responsible for the 3nm ... . Physical implementation of blocks and top-level including clock-tree. . Physical verification and timing closure for block and chip-level. . Static and dynamic… more
    Broadcom (11/01/24)
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  • Digital Engineer Principal

    SAIC (Vandenberg Air Force Base, CA)
    …MBSE tools to support reviews and analysis. + Prepare briefings for senior decision makers. **Qualifications** **Required Education:** + Bachelors and nine (9) years ... documentation to include concepts of operations, interface control documents, and verification and test. + Ability to provide technical and programmatic direction… more
    SAIC (12/31/24)
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