- SpaceX (Sunnyvale, CA)
- ASIC / SOC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... to make this possible, with the ultimate goal of enabling human life on Mars. ASIC / SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... make this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where ... ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN METHODOLOGY/CAD ENGINEER ...+ Interface directly with RTL, physical design, package design, DFT and other teams to improve methodologies and efficiencies… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …world of technology. We are looking for SoC / ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and experience ... preferred. + Prior 5-15 years of professional experience in SoC / ASIC Digital Design with focus on Design... Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT… more
- Amazon (Cupertino, CA)
- …trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/ DFT signal routing - As a key ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies...related field - 5+ years in RTL design for SOC - 5+ years of VLSI engineering - 5+… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams.... teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes,… more
- Google (Sunnyvale, CA)
- SoC Physical Design Engineer _corporate_fare_ Google...complex SoC . + Experience with multiple-cycles of SoC in ASIC design. + Experience with ... within AI/ML-driven systems. As a System on a Chip ( SoC ) Physical Design Engineer , you will collaborate...will collaborate with Register-Transfer Level (RTL), Design for Testing ( DFT ), Floorplan, and full-chip Sign off teams. Additionally, you… more
- SpaceX (Sunnyvale, CA)
- …bus routing, sequential pipeline planning and top level design for testability ( DFT ) planning + Collaborate with chip architects, ASIC engineers, package ... Sr. Full Chip Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring… more