- Broadcom (San Jose, CA)
- …apply.** **Job Description:** Broadcom's CSG division is seeking candidates for a Staff DFT engineer position. The successful candidate will be responsible for ... DFx solutions while optimizing the cost for test. **Responsibilities** + Own IP DFT architecture, implementation, verification, signoff STA constraints for DFT +… more
- Broadcom (San Jose, CA)
- …have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** DFT Quality Engineer ** Broadcom's ASIC Product Division is seeking candidates ... for a DFT Quality Engineer position at our San Jose design center in CA. In this role, you will play a crucial part in ensuring the Quality, Yield & Test Costs… more
- Broadcom (San Jose, CA)
- …San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role, you ... our HBM, DDR and SerDes designs through comprehensive Design for Test ( DFT ) verification strategies. You will work collaboratively with cross-functional teams to… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** Broadcom is searching for a DFT IC Design Engineer to join the Data Center Solutions Group. This ... this position will require in-depth knowledge and expertise towards DFT related aspects of IC Design through RTL and...are not limited to the following:** + Execution of DFT implementation, verification, and debug + Working with BISR,… more
- Broadcom (San Jose, CA)
- …you apply.** **Job Description:** Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible for leading most ... network switching ASIC DFx (Design for Test/debug & manufacturability) from DFT architecture, to implementation, verification, timing closure, ATE pattern bringup. .… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …an impact on the world of technology. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and ... SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT...( DFT ) + Should possess intimate knowledge of DFT insertion flows + Basic scan chain insertion using… more
- Renesas (San Jose, CA)
- Principal Digital Engineer Job Description This is an opportunity to join Renesas Infrastructure and Mixed-Signal Division, Memory Interface Product Line. You will ... selection, partitioning of hardware/firmware, RTL design, verification, FPGA prototyping, DFT , and IC qualification. **Responsibilities:** + Chip architecture, design,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to make an impact on the world of technology. Job Title: Lead Application Engineer Location: Tampere, Finland Reports to: AE Director Job Overview: This Digital IC ... with Cadence EDA tools for Synthesis, Logical Equivalency Checking (LEC), Design-for-Test ( DFT ), Place & Route and Static Timing Analysis (STA).You may get involved… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** Broadcom is seeking a highly motivated **Test Engineer ** to join our Semiconductor Test Engineering team. In this role, you ... analyze results to drive yield and performance improvements. + Work with ** DFT , design, and product engineering teams** to define test requirements, improve test… more
- Cisco (San Jose, CA)
- **Sr. ASIC Engineer ** The application window is expected to close on 1/26/2026. The job posting may be removed earlier if the position is filled or if a sufficient ... customer shipments. **Your Impact** You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding...oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing… more
- SanDisk (Milpitas, CA)
- …keep our world moving forward. **Job Description** We are seeking a Senior Engineer , Product Development Engineering to join our innovative team in Milpitas, United ... yield improvement efforts with appropriate functional owners; + Driving DFT techniques and implementing automation solutions where possible **Qualifications**… more
- Cisco (San Jose, CA)
- …manage the OSAT production test activities. Your Impact You will be a Test Engineer in Silicon Operations focusing on the ATE test bring-up. You will partner with ... Preferred Qualifications * Excellent knowledge of the latest state-of-the-art trends in DFT insertion techniques, including JTAG, Scan, ATPG, SerDes, PCIe and MBIST.… more
- Broadcom (San Jose, CA)
- …**Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer . In this highly visible role you will be working on ASIC for ... generating UVM RAL model + Prior experience in verification of the DFT design, architecture, and microarchitecture + Proficient with scripting languages like PERL,… more
- Amazon (San Jose, CA)
- …performant, low-cost satellite bus and payload. As a Sr. PCBA Manufacturing Engineer , you will work across design engineering, supply-chain, quality, and our ... as next gen low temp alloys. - Experience with flying probe test systems and DFT - Knowledge of quality tools such as Lean principles, Six Sigma, root cause analysis… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …with IC digital implementation flows and font-end EDA tools including Synthesis, DFT , and Logical Equivalence Checking + Prior experience with Cadence tools such ... as Genus, Innovus, Conformal, Tempus, Modus, Voltus or ICC, ICC2, DC or Primetime is highly desired + Experience with advanced nodes 5nm and below The annual salary range for California is $157,500 to $292,500. You may also be eligible to receive incentive… more
- Broadcom (San Jose, CA)
- …LVS/DRC - Low power, signal integrity experience - Work closely with RTL & DFT designers - Strong TCL/Python scripting knowledge required, Perl is a plus. - Good ... debug skill and be able to work around issues - Tape out experience - must be a good team player **Additional Job Description:** **Compensation and Benefits** The annual base salary range for this position is $120,000 - $192,000 This position is also eligible… more
- Actalent (Menlo Park, CA)
- …definition, and thermal and EMC optimization. + Knowledge of medium to high volume DFT and DFM. + Previous experience in the solar, energy storage, electric vehicle, ... or charging industry is a plus. + Experience with battery management systems, power electronics, high-speed digital design, or RF is a plus. + Familiarity with development of digital and analog interfaces for test systems, especially using Labview, Matlab, or… more
- Cisco (San Jose, CA)
- …Team** You will be part of the Silicon One development organization as an ASIC implementation engineer in San Jose, CA. As a member of this team you will be involved ... Impact** You will be the lead to drive the DFT /DFx and quality process through the early product life...Responsibilities:** + Responsible for development of the comprehensive Design-for-Test ( DFT ) & DFx solutions and architectures that support ATE… more
- Broadcom (San Jose, CA)
- …Sign-In before you apply.** **Job Description:** Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such ... as physical design, STA, DFT , and packaging? Have you taped out so many...Our ASIC products division is looking for a senior engineer to guide Customer teams designing challenging chips in… more
- Cisco (San Jose, CA)
- …to first customer shipments. **Your Impact** You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, ... member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes. + Option to also do… more