- Google (Sunnyvale, CA)
- …using SystemVerilog or similar Hardware Description Language (HDL), and industry experience in silicon power or RTL design . Preferred qualifications: + ... ASIC design . + Experience in developing chip power architecture or design . Experience with optimizing silicon designs for low- power + Experience in… more
- Meta (Sunnyvale, CA)
- …novel packaging schemes such as 2.5D/3D and heterogeneous integration to improve bandwidth, power efficiency and package form factor for next generation versions ... **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical Operation team to support the development of… more
- Google (Mountain View, CA)
- …SystemVerilog. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low- power design techniques. + Experience ... of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of...Silicon Validation teams to ensure functionality of the design . + Provide input on synthesis, timing closure, and… more
- Google (Mountain View, CA)
- …what-if trade-off analysis to guide product roadmap and feature decisions. + Perform post- silicon power and performance characterization, create power walks ... + Knowledge of the impact of software and architectural design decisions on system performance, power and...of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of… more
- Google (Mountain View, CA)
- …Integration. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low- power design techniques. + Experience ... methodologies for clock domain checks, reset checks and low power design . + Experience with FPGA and...of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of… more
- Google (Mountain View, CA)
- …testing. Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. ... verification techniques and methodologies (eg, formal, GLS, UPF based Power simulations, UVM and C based testing, etc.) to...UVM and C based testing, etc.) to achieve bug-free Silicon in SoCs. + Experience in ARM and RISC-V… more
- NVIDIA (Santa Clara, CA)
- …and post- silicon methodologies to characterize silicon features, correlate silicon behavior with simulations, and provide design feedback. + Find ... skills. Experience working with offshore teams preferred. + Hands-on experience with silicon bringup, frequency and power characterization, Tester to System… more
- Google (Mountain View, CA)
- …+ Experience with system-on-chip silicon architecture or hardware or systems design and performance or power tradeoffs for consumer products. + Experience ... Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products.… more
- NVIDIA (Santa Clara, CA)
- …What you'll be doing: + Innovate and Design : Architect and design innovative system-level testing capabilities for complex silicon designs to improve ... MS in Electrical/Computer Engineering or equivalent experience. + 10-15 years in silicon system architecture, digital design , validation, and debugging. + Strong… more
- Google (Sunnyvale, CA)
- …Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. ... on computer architecture. + 2 years of experience with C++/Python software design principles. + Experience with hardware description languages (eg, System Verilog)… more
- Silicon Valley Power (Santa Clara, CA)
- …Stadium Authority, visit our websitehere (https://www.santaclaraca.gov/our-city/santa-clara-stadium-authority) . ** Silicon Valley Power (Electric Department) - ... A desire to learn and a growth mindset To learn more about Silicon Valley Power , visit our websitehere (https://www.siliconvalleypower.com/home) . **Water &… more
- Google (Mountain View, CA)
- …teams. Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You ... will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency , and integration. The US base salary range for this full-time… more
- Skyworks (San Jose, CA)
- Principal Power Amplifier/RFIC Design Engineer Apply now...at our San Jose Office, at the heart of Silicon Valley, CA . Skyworks is an innovator of ... powering the wireless networking revolution. To help Skyworks in its mission, the Principal Power Amplifier design engineer will fulfil the role of an RFIC PA… more
- Google (Sunnyvale, CA)
- …in chip package SI/PI design for interconnections and advanced package design . Preferred qualifications: + Experience in post silicon correlation with ... models. + Experience with 2.5D/3D package design such as silicon interposer, ...of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of… more
- Google (Sunnyvale, CA)
- …degree or PhD in Electrical Engineering. + 4 years of experience in design verification. + Experience in power aware verification, gate level simulations, ... of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of...the next generation of hardware experiences, delivering unparalleled performance, efficiency , and integration. As a ASIC Design … more
- NVIDIA (Santa Clara, CA)
- … power data, and driving ASIC teams to improve their units' power efficiency ; and is responsible for researching, developing, and deploying methodologies ... power analysis tools, to help improve product power efficiency . + Develop and share best.... + Develop and share best practices for performing pre- silicon power analysis. + Perform comparative … more
- Cisco (San Jose, CA)
- …modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency , scale or feature flexibility. You'll be part ... are the Service Provider (SP) Mechanical and Thermal team responsible for the design of Cisco's best high-performance, provider class routers, the Cisco 8000 series.… more
- Qualcomm (Santa Clara, CA)
- …post- silicon support. The responsibility of the position involves comprehensive pre- silicon test planning for digital power IP's, its testbench development ... this is where you come in as an ASIC Design Verification Engineer The team is responsible for the...development and formal verification (property checking). Learn and deploy power -aware UPF verification flow and methodology. Involve in developing… more
- NVIDIA (Santa Clara, CA)
- … power data and driving ASIC teams to improve their units' power efficiency ; and is responsible for researching, developing, and deploying methodologies ... captures. + Use internally developed tools and industry standard pre- silicon Gate-level and RTL power analysis tools,...concepts of energy consumption, estimation, data movement and low power design . + Familiarity with Verilog and… more
- NVIDIA (Santa Clara, CA)
- …circuits, silicon features, correlate silicon behavior with simulations. + Design tools to improve execution efficiency to facilitate the ability to work ... bringup & post- silicon characterization of new silicon to optimize performance, power , yield, and...teams to determine coverage needs and constraints. + Drive design improvements for future product based on what is… more