- Qualcomm (San Diego, CA)
- …SoC Implementation Team is looking for skilled engineers to focus on timing constraints development, power analysis, STA , and timing closure for ... This is an excellent opportunity to join the Snapdragon implementation team, which is responsible for SoCs in sub-3nm...and low-power multi-voltage domain crossings, and signoff with static timing analysis. + Collaborate closely with RTL design… more
- Amazon (San Diego, CA)
- …that is powering the latest generation of Echo devices is looking for a Sr. SOC Design Engineer- STA to continue to innovate on behalf of our customers. We are a ... Includes definition and development of signoff methodology and corresponding implementation solution - Flow for STA , Crosstalk...& Route and other local/remote teams to address the design challenges in the context of timing … more
- Qualcomm (San Diego, CA)
- …SoC implementation team is seeking talented engineers to work on synthesis, timing constraints, formal verification, power analysis, STA and CLP for premium ... chips. This is a great opportunity to join Snapdragon implementation team responsible for SoCs in sub-3nm nodes in...power. + Generate, review and validate clock domain crossing, design constraints to achieve timing closure of… more
- Qualcomm (San Diego, CA)
- …methodologies + SOC Design implementation /methodology + Process technology + Circuit Design + STA timing + Power analysis + Semi-custom design ... * Consults with internal or external users and third-party vendors to guide implementation and ensure alignment with their needs and goals. * Builds deep… more
- Qualcomm (San Diego, CA)
- …entire low power, high performance ASIC/SoC design flows (micro-architecture, RTL design , verification, synthesis, timing / STA , UPF, CLP, LEC formal ... using PowerArtist and PrimeTime PX (PTPX) and work with cross-functional teams - design , implementation , and physical design teams - to optimize power. +… more