• ASIC Design Engineer

    Google (Mountain View, CA)
    …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or ... techniques to improve RTL code, performance and power as well as low-power design techniques. + Experience with ARM-based SoCs, interconnects and ASIC more
    Google (12/10/24)
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  • Senior ASIC Design Engineer

    Tarana Wireless (Milpitas, CA)
    This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products. + Architecture ... subsystems + RTL design of digital circuits using Verilog + Frontend design development and integration of large ASIC designs including: Integration of… more
    Tarana Wireless (11/02/24)
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  • Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …to their limits. This particular position requires the individual to be part of ASIC Design effort of the next generation emulation processors Job Requirements: ... all the ASICs that go into the Palladium emulation platform which is an industry leading emulation platform...the development of complex logic systems. + Aware of ASIC design flow. Experience with design more
    Cadence Design Systems, Inc. (12/19/24)
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  • Hardware Engineer (Accelerator…

    Meta (Menlo Park, CA)
    …Hardware Engineer (Accelerator Design ) Responsibilities: 1. Specify, design , and develop hardware and platform solutions with leading-edge ASICs, ... **Summary:** Meta is seeking a versatile Hardware Engineer to join our Accelerator Design ...Lead the bring-up, validation, and launch of module and ASIC hardware. 4. Support hyper-scale deployment and obtain learning… more
    Meta (11/26/24)
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  • Silicon Packaging Design Engineer

    Meta (Menlo Park, CA)
    **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical Operation team to support the development of ... create as part of a world-class engineering team. **Required Skills:** Silicon Packaging Design Engineer Responsibilities: 1. Perform package design for… more
    Meta (10/18/24)
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  • FPGA Design Engineer

    Tarana Wireless (Milpitas, CA)
    …company built by outstanding talented people and with innovative technology. Our FPGA design team is looking for a smart, experienced, and hardworking member to ... for Tarana's next generation Fixed Broadband Wireless Access Basestation and next generation ASIC emulation in FPGA. The ideal candidate would have 2+ years of FPGA… more
    Tarana Wireless (12/10/24)
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  • Staff Engineer - Firmware Development Infra

    Western Digital (Milpitas, CA)
    …**Job Description** **ESSENTIAL DUTIES AND RESPONSIBILITIES** + SSD firmware design and development in an agile environment, involving multiprocessor (ARM/ARC), ... full life cycle of development, starting from requirements, high/low level design , implementation, unit testing, and support required documentation. + Firmware… more
    Western Digital (12/20/24)
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  • Analog Mixed Signal System Engineer

    Meta (Menlo Park, CA)
    …relevant technical field, or equivalent practical experience 6. 10+ years experience with analog design 7. Experience with ASIC design and tape-out cycles 8. ... Meta is seeking an experienced Analog Mixed Signal System Engineer to join our Platform HW team,...and bring-up of parallel links 2. Work closely with ASIC and SI teams to close links using Matlab… more
    Meta (12/05/24)
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  • Firmware Development Engineer

    Broadcom (San Jose, CA)
    …a Candidate Account, please Sign-In before you apply.** **Job Description:** Broadcom's ASIC Product Division (APD) is focused on enabling customers to develop ... Development Engineer_ will be part of a cross functional design and validation team. The successful candidate will be...IP, which are used broadly in our custom silicon ASIC products. This individual must be highly motivated and… more
    Broadcom (12/03/24)
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  • Technologist - Analog/Mixed-Signal CAD Development…

    Western Digital (San Jose, CA)
    …for the EDA design environments with focus on analog / mixed signal ASIC design in advanced nodes. + Solid understanding of PDK's, effectively manage PDK ... libraries, collaterals and drive migration of design environments for incremental releases. + Development of Calibre...and validation. + Experience with Cadence custom IC Virtuoso platform to create layout test structures, to validate verification… more
    Western Digital (11/16/24)
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  • Systems Integration Engineer

    Meta (Fremont, CA)
    **Summary:** The Systems Integration Engineer (SIE) is responsible for the successful Integration of new hardware platforms & new infrastructure technologies into ... the data center. This includes leading the system design for serviceability (DFS) requirements development, implementation along with validating new data center… more
    Meta (10/18/24)
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  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …on synthesis / technology mapping. + Develop the EDA automation flow for the platform with other engineers. + Write Design Specifications and Unit Tests for ... impact on the world of technology. We are looking for an exceptional C++ software engineer to join the Protium Software Development Team to d evelop and enhance the… more
    Cadence Design Systems, Inc. (10/01/24)
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  • Production Systems Engineer , AI Systems

    Meta (Menlo Park, CA)
    …Systems Engineer , AI Systems Responsibilities: 1. Support new MTIA platform introduction into Meta fleet by working closely with post-silicon validation team ... **Summary:** Meta is seeking a Systems Engineer to join our Release to Production (RTP)...experience in one or more domains such as: Network ASIC development (Silicon design or bring up… more
    Meta (11/06/24)
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  • Signal Integrity Engineer

    Meta (Menlo Park, CA)
    **Summary:** Meta is seeking an experienced Signal Integrity Engineer to join our Platform HW Interconnect team, focusing on Power Integrity and Signal Integrity ... for our MTIA (Meta Training Inference ASIC ) reference module and next-generation System on Wafer (SOW)...module and next-generation System on Wafer (SOW) reference module design . **Required Skills:** Signal Integrity Engineer Responsibilities:… more
    Meta (10/12/24)
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  • Principal Hardware Engineer

    Microsoft Corporation (Mountain View, CA)
    …Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, ... Cloud infrastructure. We are looking for a **Principal Hardware Engineer ** to join the CAASE team. This Principal Hardware...FPGAs and refining them into increasingly customized solutions on ASIC and FPGA. The candidate will also drive business… more
    Microsoft Corporation (12/07/24)
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  • Staff DSP Software Engineer

    Tarana Wireless (Milpitas, CA)
    As Staff DSP Engineer , you will work on the design , development, integration, and testing calibration software modules for a next-generation fixed wireless ... real-time operating systems. Collaborate closely with L2/L3 software groups and FPGA/ ASIC teams to deliver cross-layer features. Job Responsibilities: + Design more
    Tarana Wireless (12/05/24)
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  • Signal Integrity Engineer

    Cisco (San Jose, CA)
    …the Service Provider (SP) Mechanical and Thermal team responsible for the design of Cisco's best high-performance, provider-class routers, the Cisco 8000 series. The ... Cisco 8000 series utilizes Cisco's revolutionary Silicon One ASIC that delivers unmatched performance and density with feature-rich.... Your Impact You will be joining the SP platform Mechanical Thermal group in San Jose, CA, which… more
    Cisco (12/04/24)
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  • Technical Leader, Mechanical Engineer

    Cisco (San Jose, CA)
    …pre-concept commit through EOL. For new products, you will collaborate with design (hardware and mechanical), process, test, and reliability engineering to address ... at FCS. For sustaining products, you will focus on cost reduction and design related yield improvements. We are the Service Provider (SP) Mechanical Product… more
    Cisco (12/12/24)
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  • Senior DSP Software Engineer

    Tarana Wireless (Milpitas, CA)
    You will be working on the design , development and integration of calibration software modules for wireless communication systems using multiple antennas. Design ... operating systems. You will collaborate closely with L2/L3 software groups and FPGA/ ASIC teams to deliver cross-layer features. Job Responsibilities: + Design more
    Tarana Wireless (10/24/24)
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