- Meta (Menlo Park, CA)
- **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Mechanical/Thermal modeling focus for its ASIC packaging team to support the ... they can create as part of a world-class engineering team. **Required Skills:** ASIC Packaging Engineer Responsibilities: 1. As an ASIC Packaging… more
- Google (Mountain View, CA)
- ASIC Lead Engineer , Project Taara (Fixed Term) Hardware Engineering Mountain View, CA This is a fixed-term contract position for 12 months About the team: At X ... About the Role: The Taara Project is seeking an ASIC lead engineer to drive the next...+ Familiarity with IC integration with photonics and related packaging technology. Ability to evaluate the impact of different… more
- Cisco (San Jose, CA)
- …you directly if a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within Cisco, including marketing, system ... of award-winning communications and network processing silicon/ASICs, Cisco's Core ASIC Group will soon begin development of multiple next-generation designs.… more
- Cisco (San Jose, CA)
- …you directly if a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within Cisco, including marketing, system ... of award-winning communications and network processing silicon/ASICs, Cisco's Core ASIC Group will soon begin development of multiple next-generation designs.… more
- Google (Mountain View, CA)
- Senior Mixed-Signal ASIC Designer, Project Taara Hardware Engineering Mountain View, CA This is a fixed-term contract position for 12 months About the Team: Project ... Taara About the role: The Taara Project is seeking a Senior Integrated Circuit engineer leading the next generation circuit design as part of the R&D team developing… more
- Cisco (San Jose, CA)
- …integration. We are focused on all the latest technologies including optical and advanced packaging . What You'll Do Cisco SiliconOne ASIC team is looking for an ... internal platforms and external customers. We are a specialized ASIC team with experts in all aspects of Silicon...of teammates. Who You Are You are a mechanical engineer with substrate expertise working on cutting-edge technologies and… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical Operation team to support the development of ... custom Silicon for Infrastructure as well as to develop packaging solutions that are optimal for our ASIC...part of a world-class engineering team. **Required Skills:** Silicon Packaging Design Engineer Responsibilities: 1. Perform package… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** **R&D Staff Engineer ** The ideal candidate will have expertise in integrated-circuit process ... **Key Qualifications** + Broad knowledge of advanced silicon and packaging process technologies + Working knowledge of the Advanced...**Job Description** + Provide design support for IP & ASIC to create robust designs in line with advanced… more
- Broadcom (San Jose, CA)
- …have a Candidate Account, please Sign-In before you apply.** **Job Description:** The ASIC Products Division at Broadcom has developed some of the most complex IC ... 3D and 2.5D interconnects. We are seeking a design engineer with physical layout skills to develop our next...new ideas, design the next generation of leading edge ASIC products, and work on the most advanced technologies… more
- Actalent (San Jose, CA)
- Job Title: Mechanical Engineer Job Description Seeking an experienced package mechanical FEA engineer for very-large and complex packages for industry-leading ... Responsibilities + Perform finite element analysis (FEA) for complex ASIC packages. + Use ANSYS to model and correlate...+ Analyze stress and material properties. + Conduct IC packaging , including flip chip, BGA, and MCM. + Devise… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is seeking an experienced Signal Integrity Engineer to join our Platform HW Interconnect team, focusing on Power Integrity and Signal Integrity for ... our MTIA (Meta Training Inference ASIC ) reference module and next-generation System on Wafer (SOW)...Wafer (SOW) reference module design. **Required Skills:** Signal Integrity Engineer Responsibilities: 1. Work with vendors to select and… more
- Micross Components (Milpitas, CA)
- …range from bare die and wafer processing to advanced and custom packaging to component modifications and related interconnect offerings. With ambitious private ... a key role in these evolutions. Summary: The Semiconductor Reliability Test Engineer will provide technical support to STS' Environmental Screening area which… more
- Cisco (San Jose, CA)
- …methodology from conception to production. * You will also collaborate with packaging and hardware design team to ensure signal and power integrity specifications ... collaborate in order to provide an optimized design that will integrate into the ASIC . In addition, you will have the opportunity to interact with other Acacia… more