- SpaceX (Irvine, CA)
- Sr . ASIC Design Engineer (Silicon...and learning new skills COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer / Senior : ... make this possible, with the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- SpaceX (Irvine, CA)
- Sr . SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out ... of enabling human life on Mars. SR . SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON...weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $160,000.00 - $220,000.00/per… more
- SpaceX (Irvine, CA)
- Sr . ASIC Design Verification Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out ... of enabling human life on Mars. SR . ASIC DESIGN VERIFICATION ENGINEER (SILICON...changing needs and requirements COMPENSATION & BENEFITS: Pay range: Design Verification Engineer / Senior : $160,000.00… more
- SpaceX (Irvine, CA)
- Sr . DDR IP Design Engineer ...to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer / Senior : $160,000.00 ... the ultimate goal of enabling human life on Mars. SR . DDR IP DESIGN ENGINEER ...will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In… more
- SpaceX (Irvine, CA)
- Sr . SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... of enabling human life on Mars. SR . SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER ...design and timing closure + Deep understanding of ASIC design flow, top-down and bottom-up … more
- SpaceX (Irvine, CA)
- …work extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: ASIC /FPGA Engineer / Senior : $160,000.00 - $220,000.00/per year Your actual ... Sr . SerDes Characterization and Validation Engineer ...specific to space applications + Work closely with the ASIC design team to add/improve testability and… more
- SpaceX (Irvine, CA)
- …who will work alongside world-class cross-disciplinary teams (systems architecture, ASIC design , firmware, pre-silicon verification, post-silicon validation, ... Sr . IC Layout Engineer (Silicon Engineering)...meet critical milestones COMPENSATION AND BENEFITS: Pay range: Silicon Engineer / Senior : $130,000.00 - $180,000.00/per year Your actual… more
- Skyworks (Irvine, CA)
- …objectives. * Cross-functional Collaboration: Collaborate with other engineering teams, such as ASIC design , systems, and verification teams, to ensure smooth ... Secondary Market:Los Angeles Job Segment: CAD, Drafting, QA, Quality Assurance, Design Engineer , Engineering, Technology, Quality Apply now " Find… more
- Silvus Technologies (Irvine, CA)
- …of your career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a… more
- L3Harris (Anaheim, CA)
- Job Title: GPS Senior Specialist, Electrical Engineer Job Code: 16385 Job Location: Anaheim, CA - (Responsibilities must be performed onsite.) Job Schedule: 4/10 ... DOD and international allies. L3Harris DE specializes in the design and manufacture of fuses, ignition safety devices, proximity...and diverse group of professionals. Job Description: As a Sr . Specialist Electrical Engineer , the candidate must… more
- Western Digital (Irvine, CA)
- …the Firmware on SoC platforms, as well as bringing up of FPGA and ASIC . + Contribute to the Security Development Lifecycle of the Firmware by supporting its ... development at different stages, including design , threat analysis, implementation, validation, vulnerability testing, certification, and audit. **Qualifications**… more
- L3Harris (Anaheim, CA)
- Job Title: Lead Electrical Engineer for GPS Job Code: 15900 Job Location: Anaheim, CA Schedule: 4/10 Job Description: As a Lead Electrical Engineer , the ... description document, etc.) and flow down applicable requirements to other groups (software, ASIC , & test) so that they can contribute to realize the end solution… more