- NVIDIA (Santa Clara, CA)
- We are now looking for an ASIC Design Efficiency Engineer . NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... to extend the state of the art performance and efficiency . + Understand the design and implementation,...art performance and efficiency . + Understand the design and implementation, develop methodology and infrastructure to drive… more
- Qualcomm (Santa Clara, CA)
- …a closely related field is preferred + 5+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... , Computer Engineering, or a closely related field + 5+ years of experience with ASIC design and verification tools, techniques, and methodology + 5+ years of… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... Systems design . + A deep understanding of ASIC design flow including RTL design...virtual channels. + Interest or have prior experience in efficiency enhancement, such as, flow development and code generator.… more
- Qualcomm (Santa Clara, CA)
- …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related work experience. OR… more
- Qualcomm (Santa Clara, CA)
- …Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related work experience. OR ... and emulation strategies) to continuously push the quality and efficiency of test benches + Successful candidate will be...Science, Engineering, or related field and 3+ years of ASIC design , verification, validation, integration, or related… more
- Google (Sunnyvale, CA)
- …or Computer Science, with an emphasis on computer architecture. + 7 years of experience in ASIC design and in one or more successful ASIC products from ... the development of silicon-based ICs and chips. + Experience in logic design , functional, and Power, Performance and Area (PPA) closure. Preferred qualifications: +… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Emulation Responsibilities: 1. Develop emulation testbenches in System ... **Summary:** Meta is hiring ASIC Emulation Engineers within our Infrastructure organization. We...SOC interfaces. 7. Develop emulation validation components for validation efficiency in testing, debug and automation. 8. Develop and… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our ... efficiency + You are expected to understand the design and implementation, develop power metrics and drive power...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
- Google (Sunnyvale, CA)
- …of hardware experiences, delivering unparalleled performance, efficiency , and integration. As a Design Verification Engineer you will use your design and ... verification experience to verify digital designs. You will collaborate with design and verification engineers in active projects and perform verification. Using… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position ... team of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We focus relentlessly on Infrastructure improvement so that… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or ... to optimize RTL code, performance and power as well as low-power design techniques. Preferred qualifications: + Master's degree or PhD in Electrical Engineering,… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior Verification Engineer to join our Display Team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... creativity and intelligence! In this role, you will work closely with Architects and ASIC Engineers to define and implement test plan, own all tasks involved in… more
- Qualcomm (Santa Clara, CA)
- …Summary:** As a Design Verification Lead, you will lead a team of ASIC design verification engineers to verify IP and Subsystems that be integrated in ... and emulation strategies) to continuously push the quality and efficiency of test benches + Act as a technical...Science, Engineering, or related field and 6+ years of ASIC design , verification, validation, integration, or related… more
- Cisco (San Jose, CA)
- …some of the most complex ASICs being developed. Your Impact As a physical design engineer you will be spearheading the implementation of complex multi-hierarchy ... the creation of custom macros, contributing to our team's efficiency and success. Responsibilities include: * Develop and own...design of an end-to-end IP or integration of ASIC /SoC design . * Design custom… more
- Meta (Sunnyvale, CA)
- …accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital uArchitecture and ... firmware, and algorithms.We are growing our Graphics & Display ASIC Design and uArchitecture team within RL...experience. 9. 8+ years of experience as a Hardware Design Engineer for production silicon shipped in… more
- Meta (Sunnyvale, CA)
- …accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital uArchitecture and ... architecture, firmware, and algorithms.We are growing our Machine Learning ASIC Design and uArchitecture team within RL...Qualifications: 6. 5+ years of experience as a Hardware Design Engineer for production silicon shipped in… more
- Google (Sunnyvale, CA)
- …also be involved in defining and creating methodologies that enable a highly efficient design environment for all ASIC engineers. Behind everything our users see ... synthesis, and power analysis. Preferred qualifications: + Experience as a design lead or technical management of RTL engineers. + Experience architecting… more
- Google (Sunnyvale, CA)
- …also be involved in defining and creating methodologies that enable a highly efficient design environment for all ASIC engineers. Behind everything our users see ... Computer Science, with an emphasis on computer architecture. + Experience with low-power design techniques such as clock gating, power gating, and DVFS. + Experience… more