• Lead STA Solutions

    Cadence Design Systems, Inc. (San Jose, CA)
    …flows, Extraction, Power, EMIR and/or physical design and ensure integrity of delivered solutions . Individual should be able to efficiently work with Cadence R&D to ... constraints, advanced OCV/SOCV concepts, derates, PBA timing, Distributed, Concurrent and Hierarchical STA flows. . Work efficiently with R&D and customer to enable… more
    Cadence Design Systems, Inc. (10/01/24)
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  • SRAM Timing Engineer

    NVIDIA (Santa Clara, CA)
    …for timing closure, identify improvements and solutions and deploy newer features. + Lead implementation of STA solutions for multiple circuit design and ... world! We are currently looking for a SRAM Timing Engineer to join our team of dedicated engineers developing...in Static Timing Analysis and prior working experience with STA tools like NanoTime/PrimeTime. + Thorough understanding of noise,… more
    NVIDIA (10/22/24)
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  • Senior DFT Engineer

    Cisco (San Jose, CA)
    …switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs ... Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus...and reviews for chip tape out, including test coverage, STA . * Prior experience pre-silicon DFT implementation and verification… more
    Cisco (10/17/24)
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