- NVIDIA (Santa Clara, CA)
- …make a lasting impact on the world! We are now looking for an Low Power Design/Verification ASIC Engineer - New College Grad 2026. We continue to rapidly ... to deliver exceptional perf/watt solutions in a wide range of sectors. Come join NVIDIAs Low Power DV team to develop state of the art GPUs to power AI,… more
- Google (Sunnyvale, CA)
- Senior ASIC Power Engineer , ML...Level) design using Verilog or SystemVerilog. + Experience with low - power design or power reduction ... + 5 years of experience in logic design, digital ASIC , or SoC design. + Experience with RTL (Register...techniques. + Define best practices and methodologies to achieve low - power RTL designs. + Collaborate with cross-functional… more
- Meta (Sunnyvale, CA)
- …for individuals with experience in backend implementation from Netlist to GDSII in low power and high-performance designs to build efficient System on Chip ... (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop...and power grid planning 19. Experience with low power implementation, power gating,… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the...in clock domain crossing, IP-XACT based register verification and low power 22. Experience with development of… more
- Meta (Sunnyvale, CA)
- …the efficiency and innovation of our data center applications. **Required Skills:** ASIC Engineer Physical Design Responsibilities: 1. Develop and own physical ... physical design of an end-to-end IP or integration of ASIC /SoC design and point out lower power ...and power grid planning 19. Experience with low power implementation, power gating,… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN METHODOLOGY/CAD ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX...for testability (eg, IEEE 1500, 1687) and experience with low - power DFT techniques using Siemens Tessent +… more
- Amazon (Cupertino, CA)
- …design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area ... Description Amazon Web Services provides a highly reliable, scalable, low -cost infrastructure platform in the cloud that powers hundreds of thousands of businesses… more
- The Boeing Company (Mountain View, CA)
- …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products team you will develop ... processors using the latest ARM IP to enable high-integrity, low SWAP-C flight computers. And we're applying the latest...determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance + Implement FPGA/ ASIC … more
- Amazon (Sunnyvale, CA)
- …10 years or more of practical experience - Experience with wide variety of low power design techniques - Working experience with high performance industry ... you help us create? The Role: As a Senior ASIC Design Engineer , you will be part...team that is creating the semiconductor designs which will power millions of new Amazon devices. You will work… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer , Netlisting to join our dynamic and growing ... What you'll be doing: + You will drive physical design of high-frequency and low - power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level,… more
- Amazon (Sunnyvale, CA)
- …to post-silicon validation. The team works backwards from customer requirements to build super- low power , energy efficient designs that include the latest in AI, ... video processing, low power communications and CMOS fabrication technology. Key job responsibilities -Define architecture specifications based on requirements… more
- Broadcom (San Jose, CA)
- …PPA tradeoffs involved amongst various library components, and architectures + Knowledgeable in low power design and power management + Hands-on experience ... industry, including AI. Our ASIC products division is looking for a senior engineer to guide Customer teams designing challenging chips in areas such as AI, HPC,… more
- NVIDIA (Santa Clara, CA)
- …of concepts of energy consumption, estimation, data movement and low power design. + Familiarity with Verilog and ASIC design principles, including ... We are now looking for a Senior Power Architecture and Optimization Engineer ! NVIDIA...Our team is responsible for analyzing fullchip and unit-level power data, and driving ASIC teams to… more
- NVIDIA (Santa Clara, CA)
- …What you'll be doing: + Build roadmaps of memory system-level features to address low power , low noise, perf/watt efficient, and stable/reliable product ... or high-perf systems. + Strong fundamentals in EE, digital/analog design, signal integrity, low power design, memory power management techniques, timing… more
- Microsoft Corporation (Mountain View, CA)
- …platforms. + Lead design and simulation of multiphase regulators, point-of-load converters, and high- power ASIC module integration. + Develop power solution ... Cloud infrastructure. We are looking for a **Principal Hardware Engineer ,** **DC/DC Power ** to join the System...and ODM/JDM development. + Familiarity with PCB layout for low -loss and low -noise power conversion.… more
- NVIDIA (Santa Clara, CA)
- …a member of this team, you are responsible for developing and validating system level low power features with a deep understanding of products needs that will ... you will be doing: + Bring up system level low power features to address existing and...lab tools (oscilloscopes, multimeters, logic analyzers). + Experience with ASIC power saving features and methods +… more
- Broadcom (San Jose, CA)
- …Candidate Account, please Sign-In before you apply.** **Job Description:** **System Signal/ Power Integrity Engineer ** _Responsibilities_ + Support high data rate ... + Power Integrity Concepts: PDN impedance analysis and design, ultra- low impedance measurements, understanding of SMT capacitor performance metrics, use of CPA… more
- NVIDIA (Santa Clara, CA)
- …Good understanding of mathematics/physics fundamentals of electrical design. + Clear understanding of low power design techniques such as multi VT, Clock gating, ... intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's...Work on various aspects of STA, constraints, timing and power optimization. What We Need To See: + MS… more
- NVIDIA (Santa Clara, CA)
- …Power Modeling, Methodology and Analysis Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, ... are now looking for an Sr. Architecture Energy Modeling Engineer ! At NVIDIA, we pride ourselves in having energy-efficient...understanding of fundamental concepts of energy consumption, estimation, and low power design. + Desire to bring… more