- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric… more
- NVIDIA (Santa Clara, CA)
- …our team with varied strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. + ... includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips. + Participate in developing… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is hiring a SOC/IP Methodology Engineer to help design and architect next generation custom SoC/IP solutions. We are looking for special individuals ... them + Own front-end design quality checks and reviews to present the physical design team with high-quality RTL What we need to see: + BS/MS in Computer or… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior CPU Implementation Methodology Engineer to join our VLSI team! If you are looking for a challenging and exciting role and you are a ... from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical ...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- NVIDIA (Santa Clara, CA)
- …+ Engage with EDA providers on 3D-IC EDA feature requirements and 3D-IC design methodology . + Design optimization of 3D advanced silicon/package ... 3D-IC Test Chips validation of 3D-IC technology platforms and design methodology . What we need to see:...Familiarity with Machine Learning/Deep Learning + Experience in other Physical Design methodologies such as P&R, DFT,… more
- NVIDIA (Santa Clara, CA)
- …today. The NVIDIA Clocks group is looking for a top ASIC Methodology engineer with proven experience in high-speed logic design and verification. In order to ... needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be doing: + Develop Clock RTL generation and… more
- Stanford University (Stanford, CA)
- …and interpersonal skills will be crucial to success. The chief of data analytics, methodology and integration will be required to: design , develop, optimize, and ... Chief of Data Analytics, Methodology , and Integration **Hoover Institution, Stanford, California, United...a live assessment exercise. **CORE DUTIES*:** + Architect and engineer the design , development, implementation and maintenance… more
- Google (Sunnyvale, CA)
- …of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Physical Design Engineer on the chip implementation team, ... leading one or more aspects of physical design or physical design flow/ methodology , to successful tape-outs and shipping silicon. + Experience in… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. ... design such as Clocking, Power Delivery and Partition synthesis/APR. - Drive physical design and timing closure including FEV, LVS, DRC, and reliability… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in...of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely… more
- Medtronic (Santa Clara, CA)
- …products for the Neuromodulation business. The position responsibilities will focus on design and development of new products to compliment the Interventional Pain ... R&D systems or initiatives related to new technologies or therapies - from design to implementation - while adhering to policies, using specialized knowledge and… more
- Microsoft Corporation (Mountain View, CA)
- The Artificial Intelligence Silicon Engineering team is seeking a **Silicon Design Verification Engineer ** to deliver premium-quality designs once considered ... extremely efficient manner. We are looking for a **Silicon Design Verification Engineer ** to work in the...random stimulus, scoreboards and checkers, and assertions to verify design correctness. + Develop Universal Verification Methodology … more
- Microsoft Corporation (Mountain View, CA)
- …our world. The Silicon Architecture and Verification team is seeking a **Senior Design Verification Engineer ** who can work with cross-discipline teams (systems, ... Microsoft Artificial Intelligence Silicon Engineering(AISiE) team is seeking a **Senior Design Verification Engineer ** to deliver premium-quality designs once… more
- Meta (Sunnyvale, CA)
- **Summary:** Join Meta's Wearable Silicon AMS team as a Digital Mixed Signal Design Engineer and work alongside world-class researchers and engineers to develop ... and augmented reality systems. **Required Skills:** Digital Mixed Signal Design Engineer Responsibilities: 1. Collaborate with AMS...constraints, UPF files, and other collateral for hand-off to physical design 6. Perform RTL power analysis… more
- Capgemini (Santa Clara, CA)
- …_Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Design Verification Engineer_ **Location:** _CA-Santa Clara_ ... and Create verification environments using System-Verilog and Universal verification methodology -UVM IPs and SoCs with embedded CPUs and analog mixed-signal… more
- Microsoft Corporation (Mountain View, CA)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Design ** **Verification** ** Engineer ** to join the team. **Microsoft's mission is to ... constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness. + Develop Universal Verification Methodology (UVM) components… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …block and Chip top level You will also be responsible for interfacing with the Physical Design team on STA, timing closure and P&R, and participating in silicon ... of high-speed interfaces. Prior experience of collaborating with Physical Design teams in multiple successful ASIC/IP...Knowledge of the IP/SoC level timing closure flow and methodology . Strong command of synthesis, STA, design … more
- Amazon (Sunnyvale, CA)
- …that is powering the latest generation of Echo devices is looking for a Sr. SOC Design Engineer -STA to continue to innovate on behalf of our customers. We are a ... & Responsibilities: - Includes definition and development of signoff methodology and corresponding implementation solution - Flow for STA,...- Should be able to work closely with IP Design teams and Backend Physical Design… more
- Siemens Digital Industries Software (Fremont, CA)
- …IC EDA tools and design methods including: o ASIC design methodology from RTL Synthesis to Physical Implementation phases o RTL Design /Verification, ... leading EDA and MCAD tools that facilitate the architectural planning, physical design /verification, muti-die based electrical, thermal, mechanical stress… more