- Amazon (Sunnyvale, CA)
- …TV and Amazon Echo. What will you help us create? The Role: As a Senior RTL Design Engineer , you will be part of an advanced architecture team that is ... with team members across multiple disciplines - Develop detailed design specifications and documentation - Perform RTL ...detailed design specifications and documentation - Perform RTL coding and synthesis - Work with Partners/Supplier to… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... Integration. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power... code, performance and power as well as low-power design techniques. + Experience with a scripting language like… more
- Qualcomm (Santa Clara, CA)
- … development targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer , you will work with chip architects to ... specification. + RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals. + Functional… more
- NVIDIA (Santa Clara, CA)
- … design process + Develop and enhance C++ based software tools to improve RTL design productivity and quality + Research and develop software solutions to ... rtl , and gate level designs. As a software engineer , you will craft highly efficient software to automate...stand out from the crowd: + Good architecture and RTL design knowledge + Strong expertise in… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Hands-on work with Cadence customers in the areas of Frontend Digital Design Implementation including Synthesis, DFT and Logical Equivalence, Low Power, Power ... field, plus 8+ years industry experience. Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required. Prior… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …but is not limited to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + IP integration and ... and developing flows at all phases of the digital design and functional verification. It is further expected that...well as a thorough understanding of the end-to-end digital design flow in order to accurately and efficiently collaborate… more
- Qualcomm (Santa Clara, CA)
- …using a scripting language such as Perl or Python. **Roles and Responsibilities** As an RTL engineer you will own or participate in the following: * Performance ... specification. * RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals. * Functional… more
- NVIDIA (Santa Clara, CA)
- …make a lasting impact on the world. We seek an RTL Analysis Methodology Engineer to join our Logic Design Implementation team. The team develops and supports ... of proven experience with tools and methodologies for ASIC design and verification. + Direct experience with RTL... design and verification. + Direct experience with RTL Linting EDA tools. + Proficiency in Verilog and… more
- Qualcomm (Santa Clara, CA)
- …to help create a smarter, connected future for all. As a Qualcomm CPU Engineer , you will lead innovative Central Processing Unit (CPU) design efforts that ... across the world. Qualcomm Engineers collaborate with cross-functional teams to design , verify, and implement multi-core CPU operations for all Qualcomm Business… more
- Google (Mountain View, CA)
- …of RTL and functionality from a full chip perspective, collaborate with RTL design and architecture. Develop and own full chip timing constraints. + ... of High Performance ASICs. + Experience building ASIC implementation flows ( RTL -to-GDS2). Preferred qualifications: + Master's degree or PhD in Electrical… more
- Amazon (Cupertino, CA)
- …- BS in Electrical Engineering or related technical field - 5+ years of experience in RTL design for SOC - 5+ years of experience VLSI engineering - 5+ years ... will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications. - Analyze design , microarchitecture… more
- Meta (Sunnyvale, CA)
- …Area. 14. Knowledge of front-end and back-end ASIC tools. 15. Experience with RTL design using SystemVerilog or other HDL. 16. Experience managing multiple ... Engineering, relevant technical field, or equivalent practical experience. 13. Experience with RTL Synthesis and design optimization for Power, Performance,… more
- Renesas (San Jose, CA)
- Senior Staff Engineer , Electrical Design Job Description + Propose, Architect, and Design RTL in Verilog for use in a Mixed Signal Integrated Circuit + ... RTL , synthesized, and post route netlists + Fluent in Verilog RTL coding and ASIC design methodology is a must + Competence in developing design … more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position ... interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis and timing analysis.… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is hiring a Senior Design Engineer to design , analyze, and evolve next generation SoC solutions. We are looking for special individuals with passion ... of external and internal IPs. + Contribute to cross-team RTL methodologies to achieve efficient design reuse....to cross-team RTL methodologies to achieve efficient design reuse. + Evaluate microarchitectural options and collaborate with… more
- SpaceX (Sunnyvale, CA)
- Sr. DDR IP Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... of enabling human life on Mars. SR. DDR IP DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...Controller/PHY IP core development and integration + Responsible for RTL design , synthesis, timing constraints, power estimation,… more
- NVIDIA (Santa Clara, CA)
- …group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and ... Are you looking for a SOC Design Engineer opportunity? If yes, come...+ Excellent analytical and problem-solving skills. + Experience in RTL design (Verilog), verification (UVM, System Verilog),… more
- Amazon (Sunnyvale, CA)
- …Work hard. Have fun. Make history. As a Senior SOC Physical Design Engineer , you will: - Work with RTL /logic designers to drive architectural feasibility ... Echo devices is looking for a Sr. SOC Physical Design Engineer to continue to innovate on...team through excellent collaboration and teamwork with other physical design engineers as well as with the RTL… more
- Lightmatter (Mountain View, CA)
- …and efficient inference and training engines. We are hiring a Sr. Staff Digital Design Engineer to help lead ASIC development for the next-generation artificial ... define the next advance in computer architecture! Responsibilities + Implementation of RTL design according to architecture specifications for advanced ML/AI… more
- NVIDIA (Santa Clara, CA)
- … automation + Excellent analytical and problem-solving skills + Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design ... NVIDIA is hiring a SOC/IP Methodology Engineer to help design and architect...be a hands-on domain professional, able to traverse from RTL to final design closure (timing and… more