• Senior ASIC Front End

    NVIDIA (Santa Clara, CA)
    …efficiency and support + Improve the speed, flexibility and extensibility of the GPU front end build flow + Keep the GPU Continuous Integration system at ... NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position… more
    NVIDIA (11/07/24)
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  • Senior ASIC Integration and CAD…

    Palo Alto Networks (Santa Clara, CA)
    …required or equivalent military experience - MSEE preferred + Minimum 5 years experience in ASIC integration and front end design + Demonstrated success in ... we all win with precision. **Your Career** As an ASIC Integration and CAD Engineer, you will ensure that...resets, and synchronization. You will collaborate closely with the ASIC vendor and the PANW ASIC design… more
    Palo Alto Networks (12/21/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …responsible for crafting all aspects of SOC clocking. The team collaborates with the front end design team to understand the clocking requirements for the chip, ... today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...interacts with the floor-planning and back end teams to help craft the physical floorplan of… more
    NVIDIA (10/22/24)
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  • Senior ASIC Design Engineer…

    NVIDIA (Santa Clara, CA)
    …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU ... and CPU clocking. The team collaborates with the front design team to understand the clocking requirements for...The clocks team interacts with the floor-planning and back end team to help craft the physical floorplan of… more
    NVIDIA (10/22/24)
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  • Senior Synthesis Flow CAD Engineer

    NVIDIA (Santa Clara, CA)
    …diverse team creating NVIDIA's chip design methodology! We're responsible for the Front - End Design Implementation methodology for all of NVIDIA's semiconductor ... design implementation and analysis tools + Provide support for ASIC tools and flows + Assist chip design teams...experience; MS preferred + Be familiar with Verilog and ASIC design along with experience in commercial EDA tools… more
    NVIDIA (11/02/24)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    …and scalable manner + Identify inefficiencies and improvement opportunities in the front - end chip implementation process and propose ideas to tackle them ... NVIDIA System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation,...+ Own front - end design quality checks and reviews to… more
    NVIDIA (10/24/24)
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  • Senior Hardware Engineer - Micro-Architect

    quadric.io, Inc (Burlingame, CA)
    …Ph.D. in Electrical or Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front - end design + Proficiency in SystemC, SystemVerilog, or Verilog ... floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will...+ Contribute to timing closure through full product cycle ( front end , back- end , tapeout) Requirements:… more
    quadric.io, Inc (12/10/24)
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  • Senior DFT Engineer

    Cisco (San Jose, CA)
    …San Jose, CA with a primary focus on Design-for-Test. You will work with Front - end RTL teams, backend physical design teams to understand chip architecture and ... drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and… more
    Cisco (10/17/24)
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  • COPD (Customer Owned Physical Design) Engineer

    Broadcom (San Jose, CA)
    …chips for a wide range of products that keep the globe connected. Our ASIC products division is looking for senior , physical design engineering veterans to ... protocols. 2. Logic design, chip architecture, microarchitecture, Verilog RTL coding 3. Front - end logic design verification, DRC, logic synthesis 4. Knowledge of… more
    Broadcom (11/28/24)
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