- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design Engineer** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... US by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. ... inventiveness and intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in class PPA for high-performance designs, eg… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer, Netlisting to join our dynamic and ... inventiveness and intelligence. What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the ... and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and … more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON...and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $170,000.00 -… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... synthesis/timing clean design while working with the physical design team to ensure a routable...Systems design . + A deep understanding of ASIC design flow including RTL design… more
- NVIDIA (Santa Clara, CA)
- …+ As a Clocks team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency clocks. + You ... today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...and CPU clocking. The team collaborates with the front design team to understand the clocking requirements for the… more
- NVIDIA (Santa Clara, CA)
- …+ As a Clocks team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency clocks. + You ... today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...SOC clocking. The team collaborates with the front end design team to understand the clocking requirements for the… more
- Palo Alto Networks (Santa Clara, CA)
- …You will collaborate closely with the ASIC vendor and the PANW ASIC design team in floorplanning, closing timing, validating constraints, and optimizing ... RAMs, CAMs, custom IPs, and IO pads throughout the design hierarchy + Collaborate with external ASIC ...+ RTL quality checks: Lint, CDC, RDC, X-verification + Physical design for networking ASICs with wide… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Power Engineer! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our ... in SystemVerilog or similar HDL + Solid understanding of physical design and VLSI + Good communication...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Logic Design Engineer with Physical Design background! As a member of our CPU Logic Design Team, you will be responsible for the ... network and last-level caches , working closely with the physical design team on implementation, synthesis and...expertise is required as is a deep understanding of ASIC design flow including RTL design… more
- Broadcom (San Jose, CA)
- …and features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer, the ideal candidate will be responsible for ... some of the most complex and cutting edge networking ASIC 's and multi-chip solutions to market over the last...power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing… more
- Western Digital (Milpitas, CA)
- …systems architecture + Multi-disciplinary experience, including familiarity with Firmware, HW, and ASIC design PREFERRED: + Knowledge of PCIe Gen5/6 technology ... technical, cost, and schedule tradeoffs. This role requires close collaboration with ASIC , HW, Firmware, and Validation teams to navigate technical challenges and… more
- Western Digital (Milpitas, CA)
- …/ embedded systems architecture + Multi-disciplinary experience, including Firmware, HW, and ASIC design **PREFERRED:** + Knowledge of PCIe Gen5/6 technology is ... technical, cost, and schedule tradeoffs. This role requires close collaboration with ASIC , HW, Firmware, and Validation teams to navigate technical challenges and… more
- NVIDIA (Santa Clara, CA)
- …opportunity to build sophisticated GPU and Tegra chips and interact directly with unit-level ASIC , Physical Design , CAD, Package Design , Software, DFT ... NVIDIA System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design...design quality checks and reviews to present the physical design team with high-quality RTL What… more
- Broadcom (San Jose, CA)
- …that keep the globe connected. Our ASIC products division is looking for senior , physical design engineering veterans to guide teams designing some of ... Sign-In before you apply.** **Job Description:** Technical Lead for Physical Designs Are you a versatile, senior ...Well verse in EDA tools for physical design verification and sign-off. 6. Knowledge of ASIC… more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new ... building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind,...3yrs in EE/CS - 4+ years of experience in ASIC Physical Design from -… more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies including synthesis, place… more
- Teledyne (Mountain View, CA)
- …of integrated circuits and related development. Participates in all phases of physical design , including floor planning, clock synthesis, timing optimization, ... + Schematic capture + Circuit simulation + Layout and physical design + Debug and verification for...service issues + Advanced level experience with digital and ASIC design + Advanced level experience with… more
- NVIDIA (Santa Clara, CA)
- … Engineer? If yes, We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic ... high-speed mixed-signal circuit designs. What you'll be doing: + Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog… more