• Senior ASIC Power

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors ... are expected to understand the design and implementation, develop power metrics and drive power reductions +...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
    NVIDIA (10/23/24)
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  • Senior ASIC Floorplan Design…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the ... chip development. + Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities +… more
    NVIDIA (11/06/24)
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  • Senior ASIC Integration and CAD…

    Palo Alto Networks (Santa Clara, CA)
    …is to create an environment where we all win with precision. **Your Career** As an ASIC Integration and CAD Engineer , you will ensure that the ASICs in our ... pads throughout the design hierarchy + Collaborate with external ASIC vendors to define optimal floorplans, power ...external ASIC vendors to define optimal floorplans, power grids, clocking strategies, and custom routing + Guide… more
    Palo Alto Networks (12/21/24)
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  • Senior ASIC Design Engineer

    Tarana Wireless (Milpitas, CA)
    This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products. + ... circuits using Verilog + Frontend design development and integration of large ASIC designs including: Integration of Processors, Bus, Memory, and Interface IPs +… more
    Tarana Wireless (11/02/24)
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  • Senior ASIC Physical Design…

    Capgemini (Santa Clara, CA)
    **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... partitioning, timing budget generation, power planning, top-level PnR, CTS, block integration and ECO...towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries… more
    Capgemini (10/16/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications. + Analyze architectural… more
    NVIDIA (12/11/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... and Digital Systems design. + A deep understanding of ASIC design flow including RTL design, verification, logic synthesis,...the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear… more
    NVIDIA (11/05/24)
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  • Senior ASIC Verification…

    NVIDIA (Santa Clara, CA)
    The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team ... reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design...verification to deliver a bug free clocks design to power our product lines ranging from Data Centers, Consumer… more
    NVIDIA (10/16/24)
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  • Senior ASIC Verification…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This ... of computing! What you'll be doing: + As a Senior Verification Engineer at NVIDIA, you will...the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear… more
    NVIDIA (12/06/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers ... need to see: + BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD) a plus. + 5+ years… more
    NVIDIA (11/13/24)
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  • ASIC Digital Design Engineer - WiFi…

    Qualcomm (San Jose, CA)
    …to help create a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design, optimize, verify, validate, implement, ... development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to… more
    Qualcomm (12/23/24)
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  • Sr. SOC/ ASIC Physical Design…

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
    SpaceX (11/15/24)
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  • ASIC Design Verification Engineer

    Cisco (San Jose, CA)
    …Who You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of Silicon ... working together to ensure the successful verification of the ASIC throughout its lifecycle. What You'll Do You will...work as a team, to develop innovative technology and power a more inclusive, digital future for everyone. How… more
    Cisco (10/01/24)
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  • Senior ASIC Physical Design…

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... closure of high-performance designs with a focus on improving PPA (Performance, Power , Area). + Good understanding of hardware architecture and RTL/logic design for… more
    NVIDIA (12/19/24)
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  • Senior ASIC Physical Design…

    NVIDIA (Santa Clara, CA)
    …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer , Netlisting to join our dynamic and growing ... What you'll be doing: + You will drive physical design of high-frequency and low- power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level, with… more
    NVIDIA (12/25/24)
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  • Senior ASIC Timing Engineer

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... up with timing closure strategy, creating timing constraints, driving timing and power convergence, as well as ECO implementation + Apply knowledge and experience… more
    NVIDIA (12/03/24)
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  • ASIC Design Engineer , Cloud-Scale…

    Amazon (Cupertino, CA)
    …to Global 500 companies trust our robust suite of products and services to power their businesses. Diverse Experiences AWS values diverse experiences. Even if you do ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
    Amazon (12/19/24)
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  • Senior Power Architecture…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Power Architecture and Optimization Engineer ! NVIDIA prides ourselves in having energy efficient products. We believe that ... success. Our team is responsible for analyzing fullchip and unit-level power data, and driving ASIC teams to improve their units' power efficiency; and… more
    NVIDIA (12/17/24)
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  • Senior Emulation Power

    NVIDIA (Santa Clara, CA)
    We are looking for a Senior Emulation Power Engineer ! NVIDIA prides in having energy efficient products. We believe that continuing to maintain our products' ... success. Our team is responsible for analyzing fullchip and unit-level power data and driving ASIC teams to improve their units' power efficiency; and… more
    NVIDIA (11/15/24)
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  • Sr. Staff Design Engineer (Low Power

    Qualcomm (Santa Clara, CA)
    …project start to volume chip production for at least one product cycle is preferred Keywords: ASIC ; SOC; Low Power ; Power estimates; Power Intent; ... team you will be working on WiFi (802.11x) technology, SOC Design, Low Power micro-architecture, Power Intent/Implementation, power estimates and power more
    Qualcomm (10/10/24)
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