- NVIDIA (Santa Clara, CA)
- …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer(s) - PPA ... impact in a technology-focused company. What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. +… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind,...in EE/CS - 5+ years of experience in developing physical design methodology or CAD… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most ... human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive...sophisticated strategies of signing off timing in design for world-class silicon performance. + Develop tools, and… more
- NVIDIA (Santa Clara, CA)
- …EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical synthesis, placement, routing, ... We are looking for a Senior CPU Implementation Methodology Engineer to...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- NVIDIA (Santa Clara, CA)
- … Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques ... energy usage in graphics and AI workloads and make improvements in architecture, design , and power management. What you'll be doing: + Define and implement tools… more
- NVIDIA (Santa Clara, CA)
- … needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be doing: + Develop Clock RTL generation ... Methodology engineer with proven experience in high-speed logic design and verification. In order to support high frequency...solutions for supporting high speed Clocking. + Understand the physical aspects of the chip and develop better clock… more
- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design Engineer** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition ID:**… more
- Broadcom (San Jose, CA)
- …and features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer, the ideal candidate will be responsible for ... signal and power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and external teams including … more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If you ... intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in...of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. Be part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the Front-End Design ... of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis, physical design , formal equivalence checking. + Proven track record developing flows… more
- Celestica (San Jose, CA)
- …& Lean; Working Effectively with Others; D/PFMEA; 8D/Corrective Action; Equipment Safety; Design of Experiments (DOE). ** Physical Demands** + Duties of this ... Country: United States State/Province: California City: San Jose **Summary** The Senior Staff Engineer, Software develops, debugs, tests, deploys and supports code… more
- Downtown Streets Team (Santa Clara County, CA)
- …not limited to; BCOE Back2Work and START Santa Clara. Partner with fellow senior directors to design and implement results-oriented program strategies that ... in Northern and Central California, serving over 1,500 people annually. SUMMARY: The Senior Director of Employment Social Enterprise (ESE) is a key leadership role,… more
- Downtown Streets Team (San Jose, CA)
- …a key member of the senior management team. Partner with fellow senior directors to design and implement results-oriented program strategies. Foster strong ... cities in Northern and Central California, serving over 1,500 people annually. SUMMARY: The Senior Director of Bay Area & Central Coast is a key leadership role,… more
- Celestica (San Jose, CA)
- …& Lean; Working Effectively with Others; D/PFMEA; 8D/Corrective Action; Equipment Safety; Design of Experiments (DOE). ** Physical Demands** + Duties of this ... USA State/Province: New Hampshire City: Remote Employee US **Summary** The Senior Manager, Software Engineering responsible for leading and managing the employees… more
- Microsoft Corporation (Sunnyvale, CA)
- …will manage and optimize the Cloud infrastructure. We are looking for a ** Senior Power and Performance Engineer** to join the team. **Responsibilities** + Work with ... business, architecture, and design teams to understand power and performance requirements and...across the stack. + Develop power and performance modeling methodology by creating and owning System on Chip (SOC)… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do * Responsible for… more
- Gilead Sciences, Inc. (Foster City, CA)
- …to the Executive Director, Business Strategy and Operations - CDS, the Senior Director will be responsible for driving and overseeing critical strategic operations, ... the broader Gilead organization. This role will work closely with senior leadership and cross-functional teams, including Development Operations, Research, Finance,… more
- Gilead Sciences, Inc. (Foster City, CA)
- …together. **Job Description** **Talent Advisor, Performance and Talent Management ( Senior Manager)** Gilead Sciences, Inc. is a research-based biopharmaceutical ... the care of patients with life-threatening diseases. **About the role:** The Senior Manager, Performance and Talent Management is responsible for supporting the … more
- Stanford University (Stanford, CA)
- CXR Senior Process and Integration Engineer **School of Engineering, Stanford, California, United States** Research Post Date Dec 11, 2024 Requisition # 105427 Note ... emerging and advanced technologies ( **X** ), by establishing design and process service routes ( **R** ). The...on research methods; educate and train users on research methodology and effective tools and techniques. + Supervise staff… more