• Senior Hardware SoC Architect

    NVIDIA (Santa Clara, CA)
    systems architects and deep learning experts to define the next generation SoC ? NVIDIA is developing processor and system architectures that are at the ... We are looking for a Senior Hardware SoC Architect for our Tegra Team! Do you...position requires an interest in reset and boot-related chip-level infrastructure domains in SOCs. It will also require a… more
    NVIDIA (10/15/24)
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  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable IP /sub- system / SoC level verification. 2. Develop...Networking designs. 17. Experience with verification of ARM/RISC-V based sub- systems or SoCs. 18. Experience with IP more
    Meta (11/05/24)
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  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable IP /sub- system / SoC level verification. 2. Develop...or SVN. 18. Experience with verification of ARM/RISC-V based sub- systems or SoCs. 19. Experience with IP more
    Meta (10/18/24)
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  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable block/ IP /sub- system / SoC level verification 2. Develop...or SVN 16. Experience with verification of ARM/RISC-V based sub- systems or SoCs 17. Experience with IP more
    Meta (10/18/24)
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  • Senior Cloud Platform Architect

    Cadence Design Systems, Inc. (San Jose, CA)
    …are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our ... with industry security standards such as GDPR, HIPAA, PCI, SOC 2, and ISO 27001, working closely with the...end -to- end cloud services from the ground up. Infrastructure as Code ( IaC ) : Proficiency in… more
    Cadence Design Systems, Inc. (10/19/24)
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  • System and Security Engineer

    Ivalua (Fremont, CA)
    …(IIS), Networking (DNS, DHCP, TCP/ IP , Routing, Firewall, WAN, etc.), NT File System , Group Policy, RDS,SSL/TLS protocols. SOC tools: SIEM & EDR. Endpoint ... Our IT team is dedicated to manage the IT Infrastructure , Cloud computing needs and the Cloud infrastructure...scope (mainly as backup of the primary US based SOC analyst) + Assist with system builds… more
    Ivalua (09/16/24)
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  • ASIC Engineer, Power

    Meta (Sunnyvale, CA)
    …Frequency Scaling(DVFS), AVS 16. Experience architecting systems for various design scales ( IP blocks, SOC , multi-chip system ) with an understanding of ... Infrastructure organization to work on power/performance optimizations from SOC Architecture to System level. We are...around EDA tools, and low-power design to build efficient System on Chip ( SoC ) and IP more
    Meta (10/12/24)
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  • ASIC Engineer, DFT

    Meta (Sunnyvale, CA)
    …methodologies, implementation, and verification to build best-in-class System on a Chip ( SOC ) and IP for data center applications. We are looking for ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test (DFT)...in Design for Testability (DFT) methodologies and implementation for IP / SOC , with a deep understanding of Siemens/Synopsys… more
    Meta (10/18/24)
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  • ASIC Engineer, Physical Design

    Meta (Sunnyvale, CA)
    …implementation from Netlist to GDSII in low power and high-performance designs to build efficient System on Chip ( SoC ) and IP for data center applications. ... Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience...drive execution. 3. Deliver physical design of an end-to-end IP or integration of ASIC/ SoC design and… more
    Meta (10/22/24)
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  • Design Verification Engineer

    Meta (Sunnyvale, CA)
    …SystemVerilog/UVM methodology and/or C/C++ based verification. 11. 10+ years experience in IP /sub- system and/or SoC level verification based on SystemVerilog ... vendor netlists. 4. Implement scalable power aware simulation and gate level simulation infrastructure leveraging test benches in System Verilog. 5. Keep track… more
    Meta (10/18/24)
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  • Design Verification Engineer

    Meta (Sunnyvale, CA)
    …SystemVerilog, C/C++ based verification and UVM methodology. 10. 5+ years experience in IP /sub- system and/or SoC level verification based on SystemVerilog ... and use your digital design and verifications skills to implement the testing infrastructure to validate new core IP implementations and contribute to… more
    Meta (10/18/24)
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  • Network AI Hardware Engineer

    Meta (Menlo Park, CA)
    …for network acceleration. We are looking for individuals with deep experience building complex SOC and IP for data center applications and modern AI ... AI Systems . 3. Micro-architecture development. 4. Soft and hard IP identification, selection and integration. 5. Collaboration with the ASIC development,… more
    Meta (10/25/24)
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  • ASIC Engineer, Design

    Meta (Menlo Park, CA)
    …one or more of the key areas required to build successful world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class… more
    Meta (10/18/24)
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  • ASIC Engineer, Design

    Meta (Sunnyvale, CA)
    …one or more of the key areas required to build successful world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class… more
    Meta (10/12/24)
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  • ASIC Engineer, Design

    Meta (Menlo Park, CA)
    …one or more of the key areas required to build successful world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design ... using Verilog, System Verilog and HLS. 4. Soft and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test… more
    Meta (10/09/24)
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  • ASIC Engineer, Design

    Meta (Menlo Park, CA)
    …one or more of the key areas required to build successful world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design ... using Verilog, System Verilog and HLS 4. Soft and hard IP identification, selection and integration 5. Collaboration with verification and emulation teams in… more
    Meta (10/16/24)
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  • Silicon Validation Engineer

    Meta (Sunnyvale, CA)
    …delivery. **Required Skills:** Silicon Validation Engineer Responsibilities: 1. Responsible for SoC and E2E system validation plan development, execution and ... report activities. 6. Work with cross-functional teams (ie, architecture, IP , FW, EE, SoC , and product engineer...and product engineer teams) to generate validation reports for SoC and systems . 7. Able to work… more
    Meta (10/18/24)
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