- Broadcom (San Jose, CA)
- …PhD in Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design . + Deep knowledge about industry standards in Physical ... Power-grid and high speed clock constraints and specification. + Good understanding of physical design verification methodology to debug LVS/DRC issues at the… more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... refining design and timing constraints for seamless physical design closure. As part of this...with STA tools like PrimeTime/Tempus * Understanding of related digital design concepts (eg. clocking and async… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do… more
- Cisco (San Jose, CA)
- …basis to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues * ... Do Be part of the development organization as an ASIC Engineering Technical Leader with primary focus on RTL... Engineering Technical Leader with primary focus on RTL Design . * Create micro-architecture specifications and participate in reviews… more
- Cisco (San Jose, CA)
- …processor architecture, Ethernet processing, digital signal processing, high-speed logic design & verification, memory designs, and physical design ... and efficient memory designs, custom library development (Standard Cell and I/O), physical design & DFT, Signal Integrity, and complexed packaging technology.… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do… more
- Cisco (San Jose, CA)
- …strategies, and correlation between PNR, Spice, and STA, along with advising the Physical Design team on best practices. * Additionally, you'll develop ... accuracy. Who you'll work with You will collaborate with ASIC Front-end and Back-end teams to understand chip architecture...refining design and timing constraints for seamless physical design closure. As part of this… more
- Broadcom (San Jose, CA)
- … design trade-offs. You will collaborate closely with verification engineers and physical design teams to ensure functional correctness, timing closure, and ... and Timing Closure:** + Perform synthesis and work with physical design teams to achieve timing closure...or similar. + **Knowledge Areas:** + Solid understanding of digital design fundamentals such as pipelining, FSMs,… more
- Cisco (San Jose, CA)
- …testing some of the most complex ASICs being developed. Your Impact As a physical design engineer you will be spearheading the implementation of complex ... multi-hierarchy designs, ensuring robust physical design processes like logic synthesis and...design of an end-to-end IP or integration of ASIC /SoC design . * Design custom… more
- Cisco (San Jose, CA)
- …as per need for verification robustness. * Guide and mentor a team of physical design engineers on project-level backend implementation and partner closely with ... Science, with 10+ year minimum of hands-on experience in ASIC implementation and Physical verification * Experience...Experience working with one or more of the following physical design tools, such as Cadence, Innovus,… more
- Broadcom (San Jose, CA)
- …industry for IP and chip design + Working knowledge of IP and chip design flow for analog and digital + Experience with parametric and yield data analysis. ... extraction and simulation, abstract and LEF/DEF generation, LVS/ERC checks, physical verification + Conducting design reviews &...from manufacturing, technology and packaging **Job Description** + Provide design support for IP & ASIC to… more
- Western Digital (San Jose, CA)
- …for the EDA design environments with focus on analog / mixed signal ASIC design in advanced nodes. + Solid understanding of PDK's, effectively manage PDK ... **Company Description** At Western Digital , our vision is to power global innovation...libraries, collaterals and drive migration of design environments for incremental releases. + Development… more
- Cisco (San Jose, CA)
- …and guide them in refining design and timing constraints for seamless physical design closure. As part of this team, you'll contribute to developing ... excel at identifying and resolving timing issues across all design levels. You will collaborate with ASIC ...checklists to streamline STA work, along with advising the Physical Design team on best practices. Minimum… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …or as a product engineerStrong understanding of VLSI physical design and timing analysis; familiarity with digital implementation challenges including ... motivated and energetic engineer with a deep understanding of ASIC design methodologies and of every stage...silicon signoff.Experience with industry standard EDA tools in Synthesis, Physical design and Signoff at 16nm and… more
- Capgemini (San Jose, CA)
- …cutting-edge technologies in digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of the rest of ... candidate will have a deep understanding of System-on-Chip (SoC) design and architecture, as well as Expertise in performance...+ Experience with Synopsys or Cadence EDA tools and ASIC /SOC Power Analysis Tools. + Deep understanding of SoC… more
- Cisco (San Jose, CA)
- …* STA runs, more specifically at scan modes along with advising the Physical Design team on best practices. * Developing methodologies, guidelines, and ... checklists to streamline STA work, resolve design and flow issues, and drive execution to ensure...including standard cells/memory/IO/IP modeling and its usage in the ASIC flow. * Background in debugging and analyzing timing… more
- Broadcom (San Jose, CA)
- …analysis, diagnostics & yield improvement efforts + Interfacing with the customers, physical design and test engineering/manufacturing teams located globally + ... in a multi-disciplined, cross-department environment + Solid knowledge in analog and digital circuit design , and device physics fundamentals + Excellent problem… more