• ASIC Formal Verification

    Amazon (Austin, TX)
    …be responsible for defining and checking the specification of critical hardware modules using formal methods and industrial model checkers. You will be a part of a ... 2025 and September 2026 - Completed coursework or prior internship experience with formal methods (SW/HW) - Coursework or prior internship experience in the basics… more
    Amazon (10/04/24)
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  • ASIC Engineer , Design…

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
    Meta (11/09/24)
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  • ASIC Engineer , Design…

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities:...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation. 20.… more
    Meta (11/05/24)
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  • Sr. ASIC Design Verification

    Qualcomm (Austin, TX)
    …such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). Involve in developing automation ... field is preferred + 5+ years of experience with ASIC design and verification tools, techniques, and...not mandatory + Knowledge or experience with Assertion Based Formal Verification is desirable but not mandatory… more
    Qualcomm (10/14/24)
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  • Sr. ASIC Design Verification

    Amazon (Austin, TX)
    …in the validation of FPGAs using test benches, which can be reused for the ASIC implementation . Run formal verification of complex blocks to ensure ... in communication systems - Familiarity with Matlab - Familiarity with formal verification techniques - Strong written and verbal skills Amazon is committed… more
    Amazon (11/16/24)
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  • ASIC Verification Engineer

    Amazon (Austin, TX)
    …preferably in areas of image processing. - Familiarity with Matlab - Familiarity with formal verification techniques - Lab debug experience and/or FPGA debug - ... highly differentiated silicon into Blink and Ring battery powered devices. Our verification team works on state-of-the art SoCs in a vertically integrated team… more
    Amazon (11/16/24)
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  • ASIC Engineer Intern, Design

    Meta (Austin, TX)
    … engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer Intern, Design Responsibilities: 1. Participate in Micro-architecture, ... **Summary:** Meta is seeking an ASIC Design Engineer Intern to join...will have an opportunity to participate in design and verification of advanced IPs using state of the art… more
    Meta (11/02/24)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...in HLS 17. Experience with Synthesis, Timing Closure and Formal Verification Methodology 18. Experience with Power… more
    Meta (11/15/24)
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  • ASIC Engineer , Implementation

    Meta (Austin, TX)
    …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....Gate Level and identify power reduction opportunities. 3. Run Formal Verification checks between RTL and Gate… more
    Meta (10/17/24)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...Peripheral Subsystems 12. Experience with Synthesis, Timing Closure and Formal Verification Methodology 13. Master's or PhD… more
    Meta (10/04/24)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...Peripheral Subsystems. 10. Experience with Synthesis, Timing Closure and Formal Verification Methodology. 11. Master's or PhD… more
    Meta (09/06/24)
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  • Sr ASIC Modem design Engineer

    Amazon (Austin, TX)
    …Familiarity with UVM and Matlab. . Ability to write assertions and exposure to Formal verification Amazon is committed to a diverse and inclusive workplace. ... Come work at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design...solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your… more
    Amazon (11/16/24)
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  • Sr. ASIC Design Engineer , Project…

    Amazon (Austin, TX)
    …Familiarity with UVM and Matlab . Ability to write assertions and exposure to Formal verification Amazon is committed to a diverse and inclusive workplace. ... blocks . Perform initial synthesis & timing analysis . Assist verification team in unit verification including test plan development . Assist with debug and… more
    Amazon (11/14/24)
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  • Design Verification Engineer

    Meta (Austin, TX)
    …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with a ... of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation. 11.… more
    Meta (11/13/24)
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  • Design Verification Engineer

    Meta (Austin, TX)
    **Summary:** As a Design Verification Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital ... multiple state of the art SOCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation. 14.… more
    Meta (10/18/24)
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  • Design Verification Engineer

    Meta (Austin, TX)
    …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with a ... multiple state of the art IPs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation. 12.… more
    Meta (10/17/24)
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  • Physical Design Engineer

    Qualcomm (Austin, TX)
    …timing fixes and functional ECOs, debugging and fixing physical violations, and formal verification . The individual also should have deep knowledge on ... Compiler - Timing closure experience in Synopsys PTSI - Formal verification experience - Power domain analysis...Science, Engineering, or related field and 6+ years of ASIC design, verification , validation, integration, or related… more
    Qualcomm (10/29/24)
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  • Digital Design Engineer , Project Kuiper

    Amazon (Austin, TX)
    …Familiarity with UVM and Matlab. . Ability to write assertions and exposure to Formal verification Amazon is committed to a diverse and inclusive workplace. ... Come work at Amazon! We're hiring a Digital Design Engineer within a high performance ASIC design...solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your… more
    Amazon (10/29/24)
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  • CAD Physical Design Engineering Winter/Spring…

    Skyworks (Austin, TX)
    …design flows to use open-source tools. These flows include logic synthesis, formal verification , place and route, parasitic extraction, static timing ... parasitic extraction, timing analysis, power and rail analysis, signal integrity analysis, formal and physical verification . + Knowledge of scripting languages… more
    Skyworks (11/08/24)
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