- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... Architecture and Digital Systems design . + A deep understanding of ASIC design flow including RTL design , verification, logic synthesis, timing analysis,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... & bus protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis and… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to ... BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)...+ You have experience with all stages in the ASIC design flow including emulation, prototyping, DFT,… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the ... development. + Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities +… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design ...**Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San Francisco_… more
- Qualcomm (Santa Clara, CA)
- …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... in Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related work experience. OR Master's degree… more
- Cisco (San Jose, CA)
- …You'll Work With: You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely ... for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers...designers, hardware and cross functional teams to verify the ASIC in simulation, in emulation and during ASIC… more
- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. ... What you'll be doing: + Drive next generation physical design work to achieve best in class PPA for...high-performance designs, eg Nvidia's CPUs and GPUs. + Explore design space, create optimum floorplan, drive synthesis, physical implementation,… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer , Netlisting to join our dynamic and ... What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at...checks, etc. + Help in all aspects of physical design , such as driving timing convergence, timing constraints generation… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... methodologies to meet the demands of next generation IPs. + Enable design specification development but participating in discussions on architecture, intent, and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is seeking an ASIC Design Engineer Intern to join our Infrastructure organization. Our servers and data centers are the foundation upon ... ASIC engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer Intern, Design Responsibilities: 1. Participate in… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video… more
- Meta (Sunnyvale, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Micro-architecture development. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video… more