- Meta (Sunnyvale, CA)
- …at the entire stack, from transistor, through architecture, to firmware, and algorithms. As a DFT Engineer at Meta Reality Labs, you will play an integral role ... effort in getting functional products to millions of customers quickly. **Required Skills:** DFT Engineer Responsibilities: 1. Work with the Silicon teams to… more
- Qualcomm (Santa Clara, CA)
- …digital transformation to help create a smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip designers, implementation ... engineers and test engineers to verify the DFT and DFD (Design for Debug) architecture, implementation, and...using Verilog or VHDL + Experience with ASIC test, DFT , and debug + 5+ years of practical experience… more
- NVIDIA (Santa Clara, CA)
- …tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior DFT Engineer to join our dynamic and growing team! If you are problem ... test methods needed for data collection. + Hands-on knowledge of industry standard DFT EDA tools. + Proficiency in programming and scripting languages, such as… more
- Broadcom (San Jose, CA)
- …San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role, you ... our HBM, DDR and SerDes designs through comprehensive Design for Test ( DFT ) verification strategies. You will work collaboratively with cross-functional teams to… more
- Meta (Sunnyvale, CA)
- …DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement DFT strategies for ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work...our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and verification to build best-in-class System… more
- Palo Alto Networks (Santa Clara, CA)
- …manufacturing capabilities to build our next-generation network firewalls. As a Hardware Test Engineer ( DfT ), you will be responsible for building advanced test ... and serviceability with ICT and boundary scan + Drive DfT and test coverage analyses from early Prototype design...testing experience + Experience with electronics system design and DfT + Experience with Boundary Scan development tools like… more
- Cisco (San Jose, CA)
- …Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you ... groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... + In addition, you will help develop and deploy DFT methodologies for our next generation products. + You...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... in our team, you will help develop and deploy DFT verification methodologies for various DFT features...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- …experience) with 5+, MSEE with 3+, or PhD with 2+ years of experience in DFT , system architecture, or RTL design. + Understanding of fundamental DFT topics, such ... of MBIST and IOBIST fundamentals. + Experience in architecting DFT access mechanisms in 3D stacked and dielet/chiplet based...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- Cisco (San Jose, CA)
- …Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you ... networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow...You'll Do * Responsible for implementing the Hardware Design-for-Test ( DFT ) features that support ATE, in-system test, debug and… more
- Microsoft Corporation (Mountain View, CA)
- …of Artificial Intelligence and Computing. We are looking for a **Senior Silicon Engineer ** to join our team! If you are like tackling complex Register Transfer ... hierarchical and block-level partitions between RTL, Design for Testability ( DFT )-inserted RTL and Gate-level/Power-Ground (PG) Connected netlists on Microsoft's… more
- NVIDIA (Santa Clara, CA)
- …characterization problems. + Cross functionally lead efforts with design, foundry, DFT , test, Planning and quality to root-cause and solve technical problems. ... characterization and qualification. + Knowledgeable in ATE test flows, DFT and device physics. + Proficient in statistical data...industry's best employers. If you're a creative and autonomous engineer with a real passion for technology, we want… more
- SpaceX (Sunnyvale, CA)
- Sr. DDR IP Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars ... enabling human life on Mars. SR. DDR IP DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience...crossing (CDC) logic + Exposure to Design For Test ( DFT ), understanding of scan and writing DFT … more
- NVIDIA (Santa Clara, CA)
- We are looking for a creative ATE Test Development Engineer . NVIDIA has continuously reinvented itself for three decades. Our invention of the GPU in 1999 fueled the ... + Actively participate with cross functional teams including Product Development Engineering, DFT , and IC design to efficiently debug product failures and implement… more
- Abbott (Alameda, CA)
- …technology. Our location in Alameda, CA , currently has an opportunity for an Electrical Engineer . Work independently in a lead role, or as part of a team to design, ... using Altium design tools. Anticipate and resolve DFM and DFT issues. Develop product specifications, design FMEAs, and V&V...tool, EMC design and test (NFC, BLE, Cellular), DFM, DFT , ultra-low power analog design, Agile PLM tool, design… more
- Renesas (San Jose, CA)
- Senior Staff Engineer , Electrical Design Job Description + Propose, Architect, and Design RTL in Verilog for use in a Mixed Signal Integrated Circuit + Contribute ... Experience in digital design implementation including logical synthesis and DFT insertion with high coverage + Experience in static...and ATE support is a plus + Experience in DFT or physical design is a plus + Experience… more
- Cisco (San Jose, CA)
- …Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you ... networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow...physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities will include: * Perform full… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan, BIST, etc. +… more
- Amazon (Sunnyvale, CA)
- …the world. Come work at Amazon! The Role: As Senior Silicon ATE Test Engineer , you will engage with an experienced cross-disciplinary staff to conceive and design ... SoCs tested on Teradyne and Advantest equipment. Convert test patterns from the DFT team into tester-suitable formats (eg ATP). Run test vectors on test platforms… more