• Interposer Physical Design

    Google (Sunnyvale, CA)
    …field, or equivalent practical experience. + 10 years of experience in ASIC physical design flows and methodologies in advanced process nodes. + Experience ... routing or PnR tool routing. + Experience with layout, physical verification, Design for Manufacturability (DFM), power...+ Experience with leading one or more aspects of interposer or package design . + Experience in… more
    Google (10/29/24)
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  • ASIC Packaging Engineer

    Meta (Menlo Park, CA)
    …with existing empirical data 13. Hands of mechanical modeling stress analysis experience for interposer or fanout package design for both organic and inorganic ... **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Mechanical/Thermal modeling focus for its ASIC packaging team to support the development of… more
    Meta (11/14/24)
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  • ASIC Lead Engineer , Project Taara (Fixed…

    Google (Mountain View, CA)
    …techniques on system performance and cost. + Experience with flip-chip packaging, interposer design , and vendor engagements for prototyping. + Proficiency with ... ASIC Lead Engineer , Project Taara (Fixed Term) Hardware Engineering Mountain...input from various teams, contribute to the detailed circuit design , own the foundry submission process, oversee physical more
    Google (10/18/24)
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  • Chip Package Signal and Power Integrity…

    Google (Sunnyvale, CA)
    …, silicon bridge, 3D die stacking. + Experience in cross-functional collaboration with chip top design , physical design , STA, package, system design , and ... integration. As a Chip Package Signal and Power Integrity Engineer you will be responsible for the chip package...of a larger team with Chip Architects, ASIC Engineers, Physical Design and other SI/PI Engineers. You… more
    Google (11/12/24)
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